cvw/synthDC
2022-02-09 18:42:48 -06:00
..
hdl Adjusted synthesis to compile rv32e on 12T library 2022-02-04 00:45:16 +00:00
scripts Added saif to synthDC flow. 2022-02-09 18:42:48 -06:00
.synopsys_dc.setup Added support for 90nm. 2022-02-09 16:06:27 -06:00
Makefile Added saif to synthDC flow. 2022-02-09 18:42:48 -06:00
README.md Update on README.md for synthDC 2022-02-09 16:20:05 -06:00

Synthesis for RISC-V Microprocessor System-on-Chip Design

This subdirectory contains synthesis scripts for use with Synopsys (snps) Design Compiler (DC). Synthesis commands are found in scripts/synth.tcl.

Example Usage make synth DESIGN=wallypipelinedcore FREQ=300

Libraries in .synopsys_dc.setup file set s8lib $timing_lib/sky130_osu_sc_t12/12T_ms/lib