David Harris
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6b172723bd
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Cleaning up Makefiles for riscof to run each set of tests individually and eliminate warnings
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2022-07-25 20:50:38 +00:00 |
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slmnemo
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5b71ceac5c
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-07-22 17:13:38 -07:00 |
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slmnemo
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0bfc3fda1b
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Fixed UART FIFO bugs and added FIFO tests
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2022-07-22 17:13:19 -07:00 |
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Daniel Torres
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b726b05d61
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fixed wally rv32e tests, updated regression makefile to new testflow
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2022-07-22 17:09:46 -07:00 |
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Daniel Torres
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e02c67ed5e
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fixed 32priv tests, now passing
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2022-07-22 15:35:20 -07:00 |
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Daniel Torres
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d95b266d49
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changes to test.vh for compatability
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2022-07-22 15:00:48 -07:00 |
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Daniel Torres
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2bbfd67082
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added changes to stvec of reference signatures, modified some tests to copy over reference file instead of running on sail
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2022-07-22 14:58:55 -07:00 |
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slmnemo
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840c40a7ab
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UART updates and PMA fix
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2022-07-22 14:49:03 -07:00 |
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slmnemo
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6d8988f71f
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Added test comments to reference output
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2022-07-22 12:35:59 -07:00 |
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Daniel Torres
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5d7171f6f8
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-07-22 11:16:09 -07:00 |
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Daniel Torres
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526f70e772
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commiting current changes to riscof wally tests
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2022-07-22 11:14:04 -07:00 |
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slmnemo
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12c92a05ff
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Added new PLIC and UART tests
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2022-07-22 07:12:55 -07:00 |
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slmnemo
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49565f944c
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Added PLIC and UART tests and new functions to the test library
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2022-07-22 07:10:39 -07:00 |
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Daniel Torres
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bd918d37ba
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added support for new version of riscof and arch tests, now supports tests that can be compiled for both rv32 and rv64
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2022-07-21 20:58:58 -07:00 |
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Daniel Torres
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d44ec059d0
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made makefile more specific, just incase future additions
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2022-07-21 12:50:02 -07:00 |
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Daniel Torres
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6e9b4f4075
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removed ugly /ref/Ref from tests.vh, added back d_fsd-align-01.S and d_fld-align-01.S tests to tests.vh, updated makefile to fix the riscof issues and fix fld fsd tests, updated testbench.sv for comptability with changes
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2022-07-21 12:47:51 -07:00 |
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slmnemo
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77f7b179ee
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fixed GPIO test by adding a new function to clear PLIC interrupts
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2022-07-19 08:59:16 -07:00 |
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Daniel Torres
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c65aa54a1e
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-07-18 12:13:48 -07:00 |
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Daniel Torres
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3f5a5e1093
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added the sail change to spike to let it all run normally
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2022-07-18 12:13:15 -07:00 |
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Katherine Parry
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8506d2be4c
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fixed uncommented line in makefile
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2022-07-14 00:01:07 +00:00 |
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Katherine Parry
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452b017f9a
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found the bug in the store modification
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2022-07-12 22:42:19 +00:00 |
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Katherine Parry
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2ada8a8bc1
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally
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2022-07-12 22:37:20 +00:00 |
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Katherine Parry
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cd53ae67d9
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moved fpu ieu write data mux to lsu
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2022-07-08 23:56:57 +00:00 |
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slmnemo
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43549b10fb
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Fixed error in gpio test
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2022-07-08 02:27:16 -07:00 |
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Katherine Parry
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0b40f38f02
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added load and store test
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2022-07-07 21:48:51 +00:00 |
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slmnemo
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f8059e9e40
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Resolved conflicts between different gpio files
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2022-07-05 18:38:52 -07:00 |
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slmnemo
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b3cd9de9e8
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Fixed discrepancies between GPIO tests and book and removed extra unused code from CLINT tests.
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2022-07-05 18:21:17 -07:00 |
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David Harris
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0232593e88
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Fixed typos in gpio test comments
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2022-07-05 04:57:42 +00:00 |
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David Harris
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c830a0baf8
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fixed tininess detection in TestFloat examples, merged change in WALLY-TEST-LIB
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2022-07-04 03:21:04 +00:00 |
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slmnemo
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8cc051915d
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Fixed make error
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2022-07-01 16:28:29 -07:00 |
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Daniel Torres
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a384a6465b
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reverted tests.vh to work on existing flow, added commented out paths to new riscof tests once that build has finished
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2022-06-29 12:32:30 -07:00 |
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Daniel Torres
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50b9b4557c
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added changes to testbench, tests and riscof for additional riscof compatability
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2022-06-29 12:23:40 -07:00 |
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slmnemo
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5ef1266d76
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Added termination line to CLINT test
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2022-06-27 20:16:29 -07:00 |
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slmnemo
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448c9fdbb9
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Add CLINT tests from book
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2022-06-27 20:09:58 -07:00 |
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slmnemo
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ee8349e832
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will this work in git
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2022-06-27 18:59:44 -07:00 |
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slmnemo
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ddf757078b
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Added reset read testcodes to GPIO
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2022-06-27 18:56:35 -07:00 |
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slmnemo
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4c8f5fbd89
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Fixed error in GPIO signature
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2022-06-23 14:12:28 -07:00 |
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David Harris
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66b148b76e
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GPIO tests
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2022-06-23 21:06:11 +00:00 |
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slmnemo
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3d794742e9
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Updating new GPIO tests
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2022-06-23 13:22:00 -07:00 |
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slmnemo
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95b22244ad
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Fixed wally-periph, regression is now working
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2022-06-23 13:08:15 -07:00 |
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slmnemo
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2b2760f5bd
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-06-21 02:16:26 -07:00 |
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slmnemo
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2b2ddbcc5e
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Added rudimentary GPIO test according to testplans in chapter 15
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2022-06-21 02:16:21 -07:00 |
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Katherine Parry
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254ebf478e
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added fld in rv32 - needs testing
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2022-06-20 22:53:13 +00:00 |
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Daniel Torres
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1ef5ed8005
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arch tests now run on spike and sail and compare signatures during build
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2022-06-17 20:53:15 -07:00 |
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Daniel Torres
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dcdd3702c3
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removed old code from makefile, simplified code in testbench
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2022-06-17 15:13:38 -07:00 |
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Daniel Torres
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3a5c02b44a
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arch bug fixes and testbench changes
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2022-06-17 15:07:16 -07:00 |
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Daniel Torres
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cf55b7edc0
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added files needed for arch to build
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2022-06-16 18:05:06 -07:00 |
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Katherine Parry
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31fd8772cf
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postprocessing unit created and passing all tests
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2022-06-13 22:47:51 +00:00 |
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DTowersM
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13c1cf12b2
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added some comments to help debuggers in the future
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2022-06-10 01:44:52 +00:00 |
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DTowersM
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dd34f25ffd
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changed DCACHE_LINELENINBITS and ICACHE_LINELENINBITS to 512, had to modigy the wfi test to increase timee before interupt to mantain compatability
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2022-06-10 00:37:53 +00:00 |
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