changed DCACHE_LINELENINBITS and ICACHE_LINELENINBITS to 512, had to modigy the wfi test to increase timee before interupt to mantain compatability

pipelined/config/buildroot/wally-config.vh

@@ -63,10 +63,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/fpga/wally-config.vh

@@ -65,10 +65,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/rv32e/wally-config.vh

@@ -66,10 +66,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/rv32gc/wally-config.vh

@@ -64,10 +64,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/rv32i/wally-config.vh

@@ -66,10 +66,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/rv32ic/wally-config.vh

@@ -64,10 +64,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/rv64BP/wally-config.vh

@@ -66,10 +66,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Legal number of PMP entries are 0, 16, or 64
 `define PMP_ENTRIES 64

pipelined/config/rv64fp/wally-config.vh

@@ -66,10 +66,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/rv64fpquad/wally-config.vh

@@ -65,10 +65,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/rv64gc/wally-config.vh

@@ -65,10 +65,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/rv64i/wally-config.vh

@@ -65,10 +65,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

pipelined/config/rv64ic/wally-config.vh

@@ -65,10 +65,10 @@
 // typical configuration 4 ways, 4096 bytes per way, 256 bit or more lines
 `define DCACHE_NUMWAYS 4
 `define DCACHE_WAYSIZEINBYTES 4096
-`define DCACHE_LINELENINBITS 256
+`define DCACHE_LINELENINBITS 512
 `define ICACHE_NUMWAYS 4
 `define ICACHE_WAYSIZEINBYTES 4096
-`define ICACHE_LINELENINBITS 256
+`define ICACHE_LINELENINBITS 512
 
 // Integer Divider Configuration
 // DIV_BITSPERCYCLE must be 1, 2, or 4

tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/privilege/src/WALLY-wfi-01.S

@@ -33,7 +33,7 @@ WRITE_READ_CSR mie, 0xFFF // Enable interrupts from all sources
 
 // Code copied from test library to cause m time interrupt, with time loop replaced with wfi.
 
-li x28, 0x40          // Desired offset from the present time
+li x28, 0x50          // Desired offset from the present time
 mv a3, x28            // copy value in to know to stop waiting for interrupt after this many cycles
 la x29, 0x02004000    // MTIMECMP register in CLINT
 la x30, 0x0200BFF8    // MTIME register in CLINT