slmnemo
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2d76953d42
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Added lock signal to ensure AHB speaks with the right bus
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2022-06-08 02:19:21 +00:00 |
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slmnemo
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6d36150c3d
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Fixed off-by-one error in busdp capture
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2022-06-07 19:36:39 +00:00 |
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slmnemo
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73e0c1c07f
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Reworked bus to handle burst interfacing
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2022-06-07 11:22:53 +00:00 |
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slmnemo
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446ad498aa
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Fixed double assignment on LSUBurstType
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2022-06-01 01:04:49 +00:00 |
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slmnemo
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cf05fec9c7
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Added signals to change HTRANS to the correct signal based on schematic as well as a way to tell if we are not on the first access
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2022-05-31 16:33:05 -07:00 |
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slmnemo
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a86c4d5ff3
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Merge branch 'cacheburstmode' of github.com:davidharrishmc/riscv-wally into cacheburstmode
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2022-05-31 15:57:55 -07:00 |
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slmnemo
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9ad1a42886
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Redid the FSM to prepare for burst mode implementation
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2022-05-31 15:57:42 -07:00 |
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slmnemo
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f78fa3b9b9
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Reverted incorrect Ack
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2022-05-28 10:06:26 +00:00 |
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slmnemo
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bc17f883d4
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changed ahb FSM and caught potential bug in ack/wordcountthreshold when on last word
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2022-05-26 18:41:27 -07:00 |
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slmnemo
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847c7930c4
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added LSUBurstDone signal to signal when a burst has finished
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2022-05-26 16:29:13 -07:00 |
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slmnemo
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80fc716cd7
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Added signal to monitor HBURST and comments for each burst in busdp
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2022-05-26 13:35:49 -07:00 |
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slmnemo
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08430a1e85
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added burst size signals to the IFU, EBU, LSU, and busdp
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2022-05-25 18:02:50 -07:00 |
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slmnemo
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d1421b88ad
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Added line to testbench to prevent annoying burst sizes
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2022-05-25 17:29:45 -07:00 |
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slmnemo
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cebf93cf9c
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idk lol it says this has an unadded change
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2022-05-25 17:17:49 -07:00 |
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DTowersM
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de60b15cfe
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-26 00:12:46 +00:00 |
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slmnemo
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012cb7439d
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-25 17:11:03 -07:00 |
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slmnemo
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b5476204da
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see commit 9042cc3c
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2022-05-25 17:10:59 -07:00 |
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Katherine Parry
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f3b28b988b
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added fcvt.sv
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2022-05-26 00:10:51 +00:00 |
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DTowersM
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a1cda79cd5
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Merge branch 'embench' into main
embench contained the working makefiles for embench and is being merged into main as it working and done
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2022-05-26 00:10:50 +00:00 |
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DTowersM
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3f7eddbc89
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working makefile for embench and removed testbench-f64
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2022-05-26 00:08:18 +00:00 |
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slmnemo
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8422095a33
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-25 17:03:26 -07:00 |
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slmnemo
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4e5505f301
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added logic to prevent cache line length from exceeding the max size of a burst.
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2022-05-25 17:03:15 -07:00 |
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cturek
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c9845b96f4
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Renamed variables for readability
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2022-05-26 00:01:51 +00:00 |
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cturek
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51debfa186
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Fixed exponent verification, added sign module and added sign tests
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2022-05-25 23:36:21 +00:00 |
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Katherine Parry
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f35450207f
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single and double conversions pass all tests
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2022-05-25 23:02:02 +00:00 |
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Madeleine Masser-Frye
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5311c0c9eb
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major revisions to ppaAnalyze
synths as namedtuples, plotting pulls from csv, support for multiple techs
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2022-05-25 20:37:54 +00:00 |
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Madeleine Masser-Frye
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81a869c921
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ppaAnalyze: docstrings and tsmc28 plotting
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2022-05-25 13:52:20 +00:00 |
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Madeleine Masser-Frye
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dd4997bd1b
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added support for tsmc28, fixed ff modules/analysis for timing
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2022-05-25 06:44:22 +00:00 |
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slmnemo
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0398aa02a0
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fixed a comment spelling typo
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2022-05-23 19:24:28 -07:00 |
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Katherine Parry
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576fe4ec24
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-23 23:11:41 +00:00 |
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Katherine Parry
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e5d2dfe94b
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added exponents to srt divider
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2022-05-23 23:07:27 +00:00 |
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David Harris
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d78451e39c
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Checked in qst2.c from James
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2022-05-23 20:26:05 +00:00 |
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Ross Thompson
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b70baed214
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-22 23:54:33 -05:00 |
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Ross Thompson
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e2cf941a23
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Possible plic fix?
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2022-05-22 23:47:01 -05:00 |
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Madeleine Masser-Frye
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d91fd44ea5
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-22 23:23:39 +00:00 |
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Madeleine Masser-Frye
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dbe4b4bafa
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added widths for csa in ppa
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2022-05-22 23:23:02 +00:00 |
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Ross Thompson
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bcb4ebf888
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-22 10:55:33 -05:00 |
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Ross Thompson
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c4f1a0362b
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Fixed receive fifo ITNR bug.
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2022-05-22 10:55:28 -05:00 |
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Ross Thompson
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92a2ad02db
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Added more debug signals to uart.
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2022-05-21 19:47:40 -05:00 |
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Ross Thompson
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099b0464dd
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Added more plic debugging signals.
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2022-05-21 14:04:08 -05:00 |
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Ross Thompson
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3c30751470
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Updated the fpga constraints.
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2022-05-21 13:32:03 -05:00 |
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Madeleine Masser-Frye
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39a3bf5cdc
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally
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2022-05-21 09:53:31 +00:00 |
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Madeleine Masser-Frye
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b832a21b73
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ppa updates
added widths to modules, automated frequency sweep synthesis, added slack violation color coding to plots
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2022-05-21 09:53:26 +00:00 |
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slmnemo
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e3a7e3e2f3
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changes suggested by ben, hopefully fixing buildroot (which is now not running)
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2022-05-20 18:42:38 -07:00 |
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Katherine Parry
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5d34db85b2
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Fixed unpacker bug LT EQ LE pass testfloat
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2022-05-20 17:19:50 +00:00 |
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Madeleine Masser-Frye
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8015b6af17
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fixed dynamic energy units
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2022-05-20 01:59:19 +00:00 |
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slmnemo
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0afac6904e
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-19 18:31:56 -07:00 |
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slmnemo
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af0300c3d7
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added documentation for ahblite burst types to ahblite.sv
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2022-05-19 18:31:46 -07:00 |
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slmnemo
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11e703c8c0
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fixed lint autofailing due to no log being produced in regression-wally
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2022-05-19 18:30:59 -07:00 |
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slmnemo
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79c28d34dc
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-19 17:51:45 -07:00 |
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