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Merge branch 'cacheburstmode' of github.com:davidharrishmc/riscv-wally into cacheburstmode

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slmnemo 2022-05-31 15:57:55 -07:00
commit a86c4d5ff3
1 changed files with 2 additions and 2 deletions
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pipelined/src/ebu/ahblite.sv
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@ -170,7 +170,7 @@ module ahblite (
assign IFUBusHRDATA = HRDATA;
assign LSUBusHRDATA = HRDATA;
assign IFUBusAck = HREADY & (BusState == INSTRREAD);
assign LSUBusAck = HREADY & ((BusState == MEMREAD) | (BusState == MEMWRITE));
assign IFUBusAck = (BusState == INSTRREAD) & (NextBusState != INSTRREAD); // *** these are wrong.
assign LSUBusAck = (BusState == MEMREAD) & (NextBusState != MEMREAD) | (BusState == MEMWRITE) & (NextBusState != MEMWRITE); // *** these are wrong.
endmodule