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Reverted incorrect Ack

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slmnemo 2022-05-28 10:06:26 +00:00
parent bc17f883d4
commit f78fa3b9b9
1 changed files with 2 additions and 2 deletions
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pipelined/src/ebu/ahblite.sv
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@ -161,7 +161,7 @@ module ahblite (
assign IFUBusHRDATA = HRDATA;
assign LSUBusHRDATA = HRDATA;
assign IFUBusAck = HREADY & (BusState == INSTRREAD);
assign LSUBusAck = HREADY & ((BusState == MEMREAD) | (BusState == MEMWRITE));
assign IFUBusAck = (BusState == INSTRREAD) & (NextBusState != INSTRREAD); // *** these are wrong.
assign LSUBusAck = (BusState == MEMREAD) & (NextBusState != MEMREAD) | (BusState == MEMWRITE) & (NextBusState != MEMWRITE); // *** these are wrong.
endmodule