Commit Graph

5005 Commits

Author SHA1 Message Date
Ross Thompson
1b6d5cbbc9 Added SPDX header to scripts. 2023-01-22 13:04:31 -06:00
Ross Thompson
19966033f1 Added SPDX header to install script. 2023-01-22 12:53:23 -06:00
Ross Thompson
5b705039a6 Added block diagram to readme. 2023-01-21 22:47:47 -06:00
Ross Thompson
a4e822fb69 More changes to the readme formatting. 2023-01-21 22:22:39 -06:00
Ross Thompson
4c4f71c27c Readme formatting. 2023-01-21 22:20:53 -06:00
Ross Thompson
3df5f477c7 Merge Install script into the README.md 2023-01-21 22:16:47 -06:00
Ross Thompson
cb41b921b7 Found minor bug in install script. 2023-01-21 22:14:58 -06:00
Ross Thompson
285cbfe530 Defaults to 1 job compiles. 2023-01-21 22:00:26 -06:00
Ross Thompson
6ae2f23280 Updated install readme. 2023-01-21 21:50:24 -06:00
Ross Thompson
5c799fa578 Added argument to install script for alternate install directory. 2023-01-21 21:31:47 -06:00
Ross Thompson
365a6e9f7a Added check for the odd Ubuntu 22.04 python2/3 issue. 2023-01-21 21:29:37 -06:00
Ross Thompson
f82e7474d9 More improvements to the tool install script. 2023-01-21 21:23:23 -06:00
Ross Thompson
b460b780aa Working toolchain install script for ubuntu. 2023-01-21 20:52:58 -06:00
Ross Thompson
70005c4c48 fixes to installer script 2023-01-21 18:00:14 -06:00
Ross Thompson
59b770ad15 fixes to install script. 2023-01-21 17:32:44 -06:00
Ross Thompson
a748cc1acb Updates to tool install script 2023-01-21 17:24:21 -06:00
Ross Thompson
b28895b662 Created a tool chain install script for ubuntu 22.04. 2023-01-21 14:03:30 -06:00
Mike Thompson
1fed4b16cc
Merge pull request #15 from ross144/main
Updates to FPGA synthesis flow and removal of debug markers
2023-01-21 10:31:21 -05:00
Ross Thompson
64eaaa670c More fixes for the debug2.xdc constraints. 2023-01-20 20:48:19 -06:00
Ross Thompson
6f0b184677 Merge remote-tracking branch 'upstream/main' 2023-01-20 20:30:44 -06:00
Ross Thompson
ee4c78c7fa More fixes to fpga ila debugger. 2023-01-20 20:28:21 -06:00
Ross Thompson
3effeb42c3 Fixed fpga constraints. 2023-01-20 20:18:04 -06:00
Ross Thompson
442de3f5b7 Updated fpga constraints. 2023-01-20 20:16:33 -06:00
Ross Thompson
a4822c9f54 Added license and comments to new script. 2023-01-20 19:50:33 -06:00
Ross Thompson
b709c224ab Updated ignore to exclude copied files. 2023-01-20 19:47:33 -06:00
Ross Thompson
e06237ad92 Removed mark_debug vivado directive from source code.
Created script to add mark_debug directive to source code based on a file which contains locations and signal which need them for the FPGA debugger.
Files output to temporary directory.
2023-01-20 19:43:18 -06:00
Ross Thompson
626bcd8608 Removed mark_debug from all source code. 2023-01-20 18:47:36 -06:00
davidharrishmc
06661d1d16
Merge pull request #14 from ross144/main
Test commit.
2023-01-20 15:31:25 -08:00
Ross Thompson
9d8fed1d35 Test commit. 2023-01-20 17:27:09 -06:00
David Harris
45218863af test 2023-01-20 15:23:38 -08:00
David Harris
3d13683c07 Continued framework for B instructions 2023-01-20 14:27:13 -08:00
David Harris
a968ae2f66 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2023-01-20 14:19:10 -08:00
David Harris
e87c2b2724 Started adding bit manipulation unit 2023-01-20 14:19:07 -08:00
Ross Thompson
b25b93df11 Repaired fpga debugger. 2023-01-20 15:26:52 -06:00
Ross Thompson
0123776037 Updated figure cache references. 2023-01-20 15:01:54 -06:00
Ross Thompson
3e1a54e80a Removed SDC from repo due to copy right issue.
Modified fpga build flow to reference it outside the repo.
2023-01-20 14:57:06 -06:00
Ross Thompson
2e9b5f9ae4 Formatting. 2023-01-20 13:13:05 -06:00
Ross Thompson
bcadbd7104 Formatting. 2023-01-20 13:09:42 -06:00
Ross Thompson
ecceea177a Formatting. 2023-01-20 13:05:10 -06:00
Ross Thompson
3d202ed2fd Reformatting cachefsm. 2023-01-20 12:49:55 -06:00
Ross Thompson
d3df8e062e Formatting. 2023-01-20 12:41:57 -06:00
Ross Thompson
1ecf4e4cc9 Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2023-01-20 12:37:12 -06:00
Ross Thompson
74ab386735 More cleanup and formatting. 2023-01-20 12:34:40 -06:00
David Harris
26cb45e240 renamed comparator module 2023-01-20 10:13:47 -08:00
David Harris
64080ac098 Updated HMC Synopysys license manager 2023-01-20 10:13:20 -08:00
Ross Thompson
340e1797ea More cleanup and formatting. 2023-01-20 12:09:21 -06:00
Ross Thompson
c5169a3e39 Formatting. 2023-01-20 11:51:10 -06:00
Ross Thompson
5b5a615e4a Integrated the missing zifence tests into the regression test. 2023-01-20 10:34:49 -06:00
Ross Thompson
29f45d6203 Imperas found a bug with the Fence.I instruction.
If a fence.i directly followed a store miss, the d$ would release Stall during the cache line write.
Then transition to ReadHold.  This cause the d$ flush to go high while in ReadHold.  The solution is
to ensure the cache continues to assert Stall while in WriteLine state.

There was a second issue also.  The D$ flush asserted FlushD which flushed the I$ invalidate.
Finally the third issue was CacheEn from the FSM needs to be asserted on an InvalidateCache.
2023-01-20 10:17:21 -06:00
Ross Thompson
da4eec7e0e Improved comment. 2023-01-19 17:41:57 -06:00