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146 Commits

Author SHA1 Message Date
Noah Boorstin
6954e6df4c buildroot: sim is now running! 
yes it only gets through 5 instructions right now. Yes that's my fault.
 2021-04-17 14:44:32 -04:00
Noah Boorstin
4f97e9e761 start to add buildroot testbench 
This still uses testbench-busybear.sv
I think it might be time to finally rename nearly 'busybear' thing to 'linux'
 2021-04-16 23:27:29 -04:00
bbracker
368c94d4ff working GPIO interrupt demo 2021-04-15 21:09:15 -04:00
bbracker
005f838b8d Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-04-08 14:28:25 -04:00
bbracker
755e2e5771 merge testbench 2021-04-08 14:28:01 -04:00
David Harris
ac8a111d61 merge conflict resolution 2021-04-08 13:53:56 -04:00
David Harris
6a6ccca3c8 fixed sim-wally-32ic 2021-04-08 13:40:16 -04:00
bbracker
31c6b2d01f Yee hoo first draft of PLIC plus self-checking tests 2021-04-04 06:40:53 -04:00
Ross Thompson
d21006d048 Partial fix to the integer divide stall issue. 2021-04-02 15:32:15 -05:00
James E. Stine
cff08adc3a Added some updates to divider - still not working all the time. Still a bug with signals within muldiv - specificaly MultDivE being modified during Execute stage. Seems to be triggered by ahblite signal. 2021-04-02 06:27:37 -05:00
James E. Stine
0495195d68 Fixed some divide -still bug in AHB causing InstStall to deassert and next instruction to get into divide unit. Hope to fix soon. Divide seems to work if given enough time. 2021-04-01 12:30:37 -05:00
Noah Boorstin
43532be770 busybear: clean up questa warnings 2021-03-31 14:02:15 -04:00
ushakya22
6b9ae41302 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-30 15:25:07 -04:00
Shreya Sanghai
339bd5d3eb Merge branch 'PPA' into main 
Conflicts:
	wally-pipelined/testbench/testbench-privileged.sv
 2021-03-25 20:35:21 -04:00
ShreyaSanghai
139c2076a1 Removed PCW and InstrW from ifu 2021-03-26 01:53:19 +05:30
Noah Boorstin
05d362e334 regression: use busybear batch instead 2021-03-25 15:34:10 -04:00
Domenico Ottolia
f134b09a97 Fix bugs with privileged tests 2021-03-25 14:06:05 -04:00
Noah Boorstin
d02c88dab5 busybear: stop NOPing out atomics 
and bump regression to check for 800k instrs, up from 200k
 2021-03-25 13:29:56 -04:00
Jarred Allen
7da8af4c68 Another tweak to regression-wally.py comments 2021-03-23 00:18:38 -04:00
Jarred Allen
82de84469f Slight change to regression-wally.py comments 2021-03-23 00:02:40 -04:00
Noah Boorstin
74bcd9b994 regression: expect 200k instead of 100k busybear instrs 
and a minor busybear bugfix
 2021-03-22 14:47:52 -04:00
bbracker
85363e941d AHB bugfixes and sim waveview refactoring 2021-03-18 18:25:12 -04:00
Shreya Sanghai
bbe0957df5 Merge branch 'gshare' into main 
Conflicts:
	wally-pipelined/regression/wave.do
 2021-03-18 17:25:48 -04:00
Ross Thompson
8f4051543c Fixed minor bug with the size of gshare. 2021-03-18 16:00:09 -05:00
Teo Ene
57f1ca5259 Switched coremark to RV64IM 2021-03-17 22:39:56 -05:00
Teo Ene
4fd0ecff69 Temporarily reverted my last few commits 2021-03-17 15:16:01 -05:00
Teo Ene
7446a7b479 fix to last commit 2021-03-17 15:07:02 -05:00
Teo Ene
d72d774a0b addition to last commit 2021-03-17 14:52:31 -05:00
Elizabeth Hedenberg
041439c008 fixing coremark branch prediction 2021-03-17 15:15:55 -04:00
Elizabeth Hedenberg
da758e9e14 Merge branch '3_3_2021' into main 
Making sure coremark works with spring break changes
 2021-03-17 14:11:37 -04:00
Ross Thompson
f070aae847 Fixed issue with sim-wally-batch. Are people still using this script? 2021-03-17 11:17:52 -05:00
Ross Thompson
3618a39087 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-17 11:07:57 -05:00
Ross Thompson
9f8f0242ca Added possibly working OSU test bench as a precursor to running a bp benchmark. 
Fixed a few bugs with the function radix.
 2021-03-17 11:06:32 -05:00
Jarred Allen
152ffd16e2 Undo accidental change 2021-03-16 18:16:00 -04:00
Jarred Allen
ae5417195a Condense the parallel and non-parallel wally-pipelined-batch.do files into one 2021-03-16 18:15:13 -04:00
Jarred Allen
f6cbe44cbd Change busybear to only check that first 100k instructions load 2021-03-16 17:43:39 -04:00
Noah Boorstin
9e1612c166 remove regression-wally.sh 2021-03-15 19:03:57 -04:00
Ross Thompson
4c8952de6a Converted branch predictor preloads to use system verilog rather than modelsim's load command. 2021-03-15 12:39:44 -05:00
Ross Thompson
806cfc4ea5 Fixed the parallel script so the rv64ic passes. 
rv32ic and busybear still have issues.
 2021-03-15 12:04:59 -05:00
Ross Thompson
7ceef2b0c6 Fixed the issue with the batch mode not working after adding the function radix. 2021-03-12 20:16:03 -06:00
Ross Thompson
6ee97830f7 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-12 14:58:04 -06:00
Ross Thompson
7743d8edc3 Cleanup of the branch predictor flush and stall controls. 2021-03-12 14:57:53 -06:00
Ross Thompson
318b642359 Improve version of the function radix which does not cause the wave file rendering to slow down. 2021-03-11 17:12:21 -06:00
Noah Boorstin
cc94046084 test regression script: add commented out rv32ic tests 2021-03-11 12:57:54 -05:00
Noah Boorstin
394b79b5de add rv32ic regression test 2021-03-11 12:40:29 -05:00
Noah Boorstin
54fa16d783 test regression script: parallalize better 2021-03-11 12:25:20 -05:00
Noah Boorstin
aba54659bf test regression script: try adding verilator checking also 2021-03-11 07:32:31 +00:00
Noah Boorstin
81c14f899d try adding delays to test regression script 2021-03-11 06:59:50 +00:00
Noah Boorstin
1093b07670 this is just a test for now, try to reimplement regression-wally in bash 2021-03-11 06:45:45 +00:00
Ross Thompson
845115302e Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-03-10 15:37:02 -06:00