Xavi/cvw
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6,101 Commits 14 Branches 1 Tag 31 MiB
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440 Commits

Author SHA1 Message Date
Kevin Kim
7eb41058c7 alu add.uw needs w64 to be false 2023-02-13 13:49:35 -08:00
Ross Thompson
1d74663f42 Partial fix for gshare bugs from the last two weeks. 2023-02-13 11:57:25 -06:00
Ross Thompson
58749a8c57 Removed another bit from btb class. 2023-02-12 11:33:43 -06:00
Kevin Kim
31787c456b simulation runs-- clmul doesn't pass lint with xor tree 2023-02-11 21:22:33 -08:00
Kevin Kim
5f08322e99 lint fixes 2023-02-11 21:13:10 -08:00
Kevin Kim
6a7fe6352e zbb, zbs, cnt lint fixes 2023-02-11 20:41:52 -08:00
Kevin Kim
61b46e0639 fixed byte unit lints 2023-02-11 20:25:34 -08:00
Kevin Kim
fb99bdab82 fixed lints in cnt 2023-02-11 20:22:42 -08:00
Kevin Kim
c59dfc1e30
fixed typo in LZC 2023-02-11 19:59:03 -08:00
Kevin Kim
38087be3b7 popcnt passes lint 2023-02-11 19:19:38 -08:00
Kevin Kim
76bc1b5999 clmul passes lint 2023-02-11 19:16:13 -08:00
Ross Thompson
1e0667db1d More simplifications to the BP. 2023-02-10 17:09:35 -06:00
Ross Thompson
9c4da7381f Experimental branch prediction optimization. 2023-02-10 15:45:56 -06:00
Kip Macsai-Goren
a7237baa87 fixed small errors to get regression to run with bit manip supported. 2023-02-10 10:37:06 -08:00
Kip Macsai-Goren
f91d74896a Merge remote-tracking branch 'upstream/main' into main 2023-02-10 10:01:14 -08:00
Ross Thompson
9c2e0de672 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-02-10 10:38:39 -06:00
Ross Thompson
c229f0064e Modified branch predictor to use InstrValidE and InstrValidD rather than the more complex InstrClassE | WrongClassE logic. 2023-02-10 10:33:10 -06:00
Ross Thompson
282ffd1313 RAS and RAS documentation now consistent. 2023-02-10 09:06:51 -06:00
Ross Thompson
faf7cd8c8a Updated globalhistory predictor. 2023-02-09 14:48:02 -06:00
Kevin Kim
726722bec2 Include Funct7 in execute 
- Modifed datapath to support funct7 in execute
- Modified controller to pass on Funct7
- all lints pass
 2023-02-09 19:18:54 +00:00
Kevin Kim
847a4145f1 added W64 zbb input signal in alu 2023-02-09 19:07:22 +00:00
Kevin Kim
e4bfa4c548 modified zbb to account for cnt module change 2023-02-09 16:45:37 +00:00
Kevin Kim
ce9dca8aec modified cnt for zbb to mux inputs 2023-02-09 16:45:22 +00:00
Ross Thompson
996bb289d3 Simplified branch predictor. 2023-02-08 18:24:38 -06:00
Kevin Kim
95ff9e91c5 moved files into bmu folder 2023-02-08 13:57:09 +00:00
Kip Macsai-Goren
0dad7bf114 Merge remote-tracking branch 'upstream/main' into main 2023-02-07 23:28:50 -08:00
David Harris
5bf709d7c3 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-07 16:49:58 -08:00
Ross Thompson
7263fab4b1 Branch predictor cleanup. 2023-02-07 14:01:59 -06:00
David Harris
195e7c1a9c Moved STATUS_FS_INT write to if statement to properly prioritize 2023-02-07 06:55:42 -08:00
David Harris
0712fa8f67 Disabled STATUS_FS at reset, fixing issue #71 2023-02-07 06:31:14 -08:00
Kip Macsai-Goren
7198592afc fixed merge conflicts with removal of pipelined folder 2023-02-06 18:04:28 -08:00
Ross Thompson
54a128491e Fixed Bug 66. 
If a load missed at the same time as a spilled instruction fetch with an ITLB miss in the second cache line, the HPTW did not wait for the load miss to finish.
 2023-02-06 17:32:28 -06:00
Ross Thompson
a33c579e4b Removed unreachable if branch in hptw next state logic. 2023-02-06 16:42:07 -06:00
David Harris
103781923e Parenthesized reduction operators to avoid DC lint 2023-02-04 18:49:47 -08:00
David Harris
1bb5599806 Developing debug test 2023-02-04 08:31:47 -08:00
David Harris
b13087e706 Fixed merge issues on synthDC PR 2023-02-04 04:13:40 -08:00
David Harris
e0915acad9 Improved illegal NaN-box detection and formatted fsgninj 2023-02-04 03:42:20 -08:00
David Harris
d7ae05ae8e Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-02-03 08:36:11 -08:00
David Harris
aae035226f Merged with memories 2023-02-02 14:50:46 -08:00
David Harris
99d179dd3e Removed pipelined level of hierarchy 2023-02-02 14:14:11 -08:00