forked from Github_Repos/cvw
fixed lints in cnt
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@ -48,25 +48,26 @@ module cnt #(parameter WIDTH = 32) (
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//NOTE: signal widths can be decreased
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always_comb begin
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//clz input select mux
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case({B,W64})
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5'b00000_0: lzcA = A; //clz
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5'b00000_1: lzcA = {A[31:0],{32{1'b1}}}; //clzw
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5'b00001_0: lzcA = revA; //ctz
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5'b00001_1: lzcA = {revA[31:0],{32{1'b1}}}; //ctzw
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case({B[4:0],W64})
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6'b00000_0: lzcA = A; //clz
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6'b00000_1: lzcA = {A[31:0],{32{1'b1}}}; //clzw
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6'b00001_0: lzcA = revA; //ctz
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6'b00001_1: lzcA = {revA[31:0],{32{1'b1}}}; //ctzw
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endcase
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//cpop select mux
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case ({B,W64})
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5'b00010_0: popcntA = A;
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5'b00010_1: popcntA = {{32{1'b0}}, A[31:0]};
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case ({B[4:0],W64})
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6'b00010_0: popcntA = A;
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6'b00010_1: popcntA = {{32{1'b0}}, A[31:0]};
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endcase
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end
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end
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else begin
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//rv32
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assign popcntA = A;
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always_comb begin
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//clz input slect mux
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case(B)
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case(B[4:0])
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5'b00000: lzcA = A;
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5'b00001: lzcA = revA;
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endcase
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