forked from Github_Repos/cvw
		
	added W64 zbb input signal in alu
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				@ -131,7 +131,7 @@ module alu #(parameter WIDTH=32) (
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  if (`ZBB_SUPPORTED) 
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    zbb zbb(.A, .B, .Funct7, .Funct3, .ZBBResult);
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    zbb zbb(.A, .B, .Funct3, .Funct7, .W64, .ZBBResult);
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  else assign ZBBResult = 0; 
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  // Support RV64I W-type addw/subw/addiw/shifts that discard upper 32 bits and sign-extend 32-bit result to 64 bits
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