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Author SHA1 Message Date
Xavi
f6ba248871 Merge pull request 'main' (#1) from Github_Repos/cvw:main into main 
Reviewed-on: #1
 2023-05-10 17:18:17 +00:00
David Harris
d4d9fa1ff6 wally installation improvements: latest main branch of riscv-arch-test, updated install script 2023-05-10 08:23:55 -07:00
David Harris
4b0b7f0aaf
Update README.md 2023-05-09 10:58:45 -07:00
Ross Thompson
69acd43263
Merge pull request #292 from davidharrishmc/dev 
Added packages requested for gcc
 2023-05-09 12:41:06 -05:00
David Harris
be7bc4c9ea Added packages requested for gcc 2023-05-09 10:30:02 -07:00
David Harris
988ae68c94
Merge pull request #291 from kjprime/main 
Add comments tlbGBL and minor optimization
 2023-05-06 09:11:34 -07:00
Kevin Thomas
968c228fcc Comment tlbGBL more discriptively 
Reduce redundant instructions
 2023-05-04 19:13:47 -05:00
Ross Thompson
6b4ca64483
Merge pull request #290 from davidharrishmc/dev 
Fixed IROM coverage issues in IFU
 2023-05-01 10:49:27 -05:00
David Harris
34880771af Fixed IROM coverage issues in IFU 2023-05-01 08:32:52 -07:00
Ross Thompson
adbd5beff1
Merge pull request #289 from davidharrishmc/dev 
Fixed redundant check of SupportedFmt on fmv
 2023-05-01 10:30:33 -05:00
David Harris
c1786bfec8 IMMU exclude non word-sized accesses 2023-05-01 08:14:19 -07:00
David Harris
bfa35d727b Fixed redundant check of SupportedFmt on fmv that caused coverage problem on fctrl 2023-04-29 05:58:40 -07:00
Ross Thompson
5f52d441cb
Merge pull request #287 from koooo142857/main 
pmppriority module
 2023-04-28 10:29:45 -05:00
Ross Thompson
a4d0a9d33e
Merge pull request #288 from davidharrishmc/dev 
Coverage improvements
 2023-04-28 10:28:28 -05:00
David Harris
d5c350c597 Merged coverage exclusions for PMP 2023-04-28 08:04:25 -07:00
David Harris
ca5a71bbe5 PMA Checker coverage 2023-04-28 07:53:59 -07:00
David Harris
22e4f82a99 Commenting 2023-04-28 07:52:08 -07:00
David Harris
2b9b2f21df
Merge branch 'main' into main 2023-04-28 07:51:32 -07:00
Kevin Wan
3569998cb9 fixed tests.vh test lines 2023-04-28 07:47:59 -07:00
David Harris
f6f43e826a Removed clear from TLBLRU because there is no need to flush LRU state and it causes coverage issues 2023-04-28 07:03:46 -07:00
David Harris
a556ea54e3 Ignore IF_vectors 2023-04-28 06:20:12 -07:00
David Harris
20631d171e
Merge pull request #284 from liamchalk00/main 
Pmpadrdecs test cases changing AdrMode to 2 or 3
 2023-04-28 06:15:58 -07:00
Liam Chalk
8ef9e77e00
Merge branch 'main' into main 2023-04-27 21:49:01 -07:00
Kevin Wan
c0cbd0fd2a added tests for pmppriority module 2023-04-27 16:12:43 -07:00
David Harris
8370ca6f69 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-27 14:33:59 -07:00
David Harris
da8c6f8266
Merge pull request #285 from Noah-G-L/main 
complete camline coverage on IFU and LSU
 2023-04-27 14:33:11 -07:00
David Harris
c04f636952
Update tlbASID.S 
fixed comment about restoring ASID to 0
 2023-04-27 14:32:57 -07:00
Noah Limpert
26cb639f89 complete camline coverage on IFU and LSU 2023-04-27 14:26:10 -07:00
David Harris
e962e95e53 CSR code cleanup 2023-04-27 14:12:57 -07:00
David Harris
e519eaa33f Renamed byteUnit to byteop 2023-04-27 14:10:46 -07:00
Liam
6803347a49 Pmpadrdecs test cases changing AdrMode to 2 or 3 
Setting AdrMode to 2 or 3 for pmpadrdecs[0-4] writing values to pmpcfg0 to change AdrMode to 2 or 3
Also exclusion for pmpadrdecs[0] coverage case for PAgePMPAdrIn being hardwired to 1 in pmpadrdec.sv
 2023-04-27 12:23:35 -07:00
David Harris
e69ebc45c0 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-27 07:30:07 -07:00
David Harris
e43de9c194
Merge pull request #282 from ross144/main 
Arty A7 board support, ImperasDV linux boot, CVW_v0.9 tag
 2023-04-27 07:23:10 -07:00
David Harris
4f6c493d5f
Merge pull request #279 from ACWright256/main 
Excluded and added coverage for WFI test case.
 2023-04-27 07:19:02 -07:00
Alexa Wright
667c54c129
Merge branch 'openhwgroup:main' into main 2023-04-26 16:26:30 -07:00
Alexa Wright
79031e3de0 Added better comment for the exclusion in privdec.sv 2023-04-26 16:25:55 -07:00
David Harris
7c1a4e5e32 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-26 15:40:11 -07:00
David Harris
0ad5165795
Merge pull request #283 from SydRiley/main 
Resolving unpackinput coverage issue with BadNaNBox, and increasing ifu and lsu coverage% through exclusions
 2023-04-26 15:40:01 -07:00
Sydeny
a40cc17dc7 For ifu and lsu exclusions added missing row numbers 2023-04-26 15:30:22 -07:00
Ross Thompson
e72fa0c081 Modified the imperas linux scripts so they run without reporting hundreds of gigabytes of data. 2023-04-26 17:29:57 -05:00
Ross Thompson
b20440e189 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-04-26 17:27:52 -05:00
Sydeny
efcb59ee35 Exclusion in the ifu and lsu to increase coverage, added missing row numbers 2023-04-26 15:26:39 -07:00
Sydeny
25b69a47a1 Excluding untoggled signals in ifu and lsu, ifu coverage from 83.68% to 84.06% and lsu from 93.45% to 93.58% 2023-04-26 14:37:55 -07:00
Sydeny
4595c22fe1 Addressing Redundant logic around BadNanBox, fpu coverage from 96.61% to 96.77% 2023-04-26 14:35:43 -07:00
David Harris
d71d84b386 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-26 05:53:42 -07:00
David Harris
42c9003cd2
Merge pull request #280 from AlecVercruysse/coverage5 
100% D$ coverage
 2023-04-26 05:52:58 -07:00
Sydeny
069ca0ec29 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-04-26 03:00:25 -07:00
Sydeny
f5258d3b22 added comments to exclusions 2023-04-26 03:00:13 -07:00
Alec Vercruysse
6299c0ef0b Cacheway Exclude FlushStage=1 when SetValidWay=1 
We determined that this case is not hit even for i$, so this
case is also excluded separately for i$. It could be a better
idea to remove the ~FlushStage check completely (if we're sure).

My reasoning for this one is written as a comment in the exclusion
script: since a pipeline stall is asserted by the cache in the fetch
stage (which happens before going into the WRITE_LINE state and
asserting SetValidWay), there seems to be no way to trigger
a FlushStage (FlushW for D$) while the stallM is active.
 2023-04-25 20:30:46 -07:00
David Harris
99438d57ba
Merge pull request #278 from liamchalk00/main 
pmpaddr0 and pmpaddr2 test cases
 2023-04-25 20:16:11 -07:00