cvw/src
2024-08-28 13:12:39 -07:00
..
cache Updated my name in multiple locations. 2024-08-21 10:50:39 -07:00
ebu Updated my name in multiple locations. 2024-08-21 10:50:39 -07:00
fpu port works, just need to add extra derived configs for k=8 2024-08-28 13:12:39 -07:00
generic Updated my name in multiple locations. 2024-08-21 10:50:39 -07:00
hazard Merge branch 'rvvi' 2024-07-22 12:01:01 -05:00
ieu Depricate conditional generation based on A_SUPPORTED, which is now computed from ZALRSC_SUPPORTED and ZAAMO_SUPPORTED 2024-08-08 05:27:35 -07:00
ifu Updated my name in multiple locations. 2024-08-21 10:50:39 -07:00
lsu Updated my name in multiple locations. 2024-08-21 10:50:39 -07:00
mdu Unused signal cleanup 2024-06-18 08:15:48 -07:00
mmu Fixed issue 868 about tlbmisc.S coverage test failing due to HPTW writing wrong address when updateing A bit 2024-07-05 21:32:57 -07:00
privileged Detect illegal writes to URO HPM counters 2024-08-15 10:43:20 -07:00
rvvi Converted fpga's rvvi from a config option to a testbench/fpga top level parameter and is envoked by passing --rvvi to wsim. 2024-07-24 12:47:50 -05:00
uncore Update PREADY signal to not stall during transmission on reads to read only registers. 2024-08-21 12:39:01 -05:00
wally Merge branch 'main' of github.com:openhwgroup/cvw into spiboot 2024-08-06 17:09:39 -05:00
cvw.sv began porting over divremsqrt 2024-08-27 17:07:35 -07:00