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Fixed issue 868 about tlbmisc.S coverage test failing due to HPTW writing wrong address when updateing A bit

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David Harris 2024-07-05 21:32:57 -07:00
parent 9279b2d56a
commit ffb248dc65
1 changed files with 1 additions and 1 deletions
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src/mmu/hptw.sv
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@ -172,7 +172,7 @@ module hptw import cvw::*; #(parameter cvw_t P) (
mux2 #(P.XLEN) NextPTEMux(ReadDataM, AccessedPTE, UpdatePTE, NextPTE); // NextPTE = ReadDataM when ADUE = 0 because UpdatePTE = 0
flopenr #(P.PA_BITS) HPTWAdrWriteReg(clk, reset, SaveHPTWAdr, HPTWReadAdr, HPTWWriteAdr);
assign SaveHPTWAdr = WalkerState == L0_ADR;
assign SaveHPTWAdr = (NextWalkerState == L0_RD | NextWalkerState == L1_RD | NextWalkerState == L2_RD | NextWalkerState == L3_RD); // save the HPTWAdr when the walker is about to read the PTE at any level; the last level read is the one to write during UpdatePTE
assign SelHPTWWriteAdr = UpdatePTE | HPTWRW[0];
mux2 #(P.PA_BITS) HPTWWriteAdrMux(HPTWReadAdr, HPTWWriteAdr, SelHPTWWriteAdr, HPTWAdr);