Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity
4,766 Commits 5 Branches 2 Tags 53 MiB
c653f1b30f
Commit Graph

4766 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
David Harris
c653f1b30f Fixed radix 2 k = 1 lint 2022-12-31 07:01:50 -08:00
David Harris
a69a3e6eee Fixed backward mux in fdivsqrtstage2 2022-12-31 06:55:20 -08:00
David Harris
dc27284b7f Broken commit starting to address radix 2 issues 2022-12-31 06:19:15 -08:00
David Harris
1e150160eb Moved shared config so wally-shared only has values a user would alter 2022-12-31 05:51:42 -08:00
David Harris
f53d1f6e9b fdivsqrt post processing cleanup 2022-12-31 05:45:15 -08:00
David Harris
d63d565616 fdivsqrt post processing major simplification 2022-12-31 05:42:51 -08:00
David Harris
cc11aa15b2 fdivsqrt post processing simplification 2022-12-31 05:37:48 -08:00
David Harris
cf74f9142b fdivsqrt post processing simplification 2022-12-31 05:36:09 -08:00
David Harris
b2593e5cf5 config file, comment, postproc cleanup 2022-12-31 05:20:56 -08:00
Cedar Turek
5988ebb145 removed unnecessary values from shared config. unbroke division 2022-12-30 21:26:55 -08:00
Cedar Turek
02887e5140 simplified initU and UM logic, separated radix2/4 logic 2022-12-30 18:57:07 -08:00
Cedar Turek
bc55cc21ae various formatting fixes and comments 2022-12-30 18:41:40 -08:00
Cedar Turek
71cdc287aa added mux to intdiv result 2022-12-30 18:06:35 -08:00
Cedar Turek
e41273e59c removed unnecessary mdue gating 2022-12-30 17:53:06 -08:00
Cedar Turek
83a3c72d8d took out broken muxes 2022-12-30 15:13:52 -08:00
Cedar Turek
013527d389 various cleanup 2022-12-30 14:31:23 -08:00
Cedar Turek
1f0e713879 Code cleanup 2022-12-30 14:13:33 -08:00
Ross Thompson
634d13b347 Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2022-12-30 15:04:54 -06:00
Ross Thompson
eed17d0553 Cleanup spill logic. 2022-12-30 14:59:51 -06:00
Ross Thompson
ffa722e648 Signal renames for PC*NextF and SelSpillNextF. 2022-12-30 14:21:20 -06:00
Cedar Turek
33ca4d1c9a commented complicated step/right shift calc 2022-12-30 12:03:10 -08:00
Cedar Turek
d7fc7c93f3 comment cleaning 2022-12-30 11:11:34 -08:00
Cedar Turek
320b1a7a89 Described internal signals of fdivsqrt top 2022-12-30 11:01:02 -08:00
Cedar Turek
dd78eb6484 Commented fdivsqrt module 2022-12-30 10:52:25 -08:00
Ross Thompson
f4a0f3f71f Removed da page fault from spill logic. 2022-12-30 12:51:56 -06:00
Cedar Turek
d19192144b Begin commenting divsqrt 2022-12-30 10:43:02 -08:00
Ross Thompson
190f03e15c Spill only occurs on 32-bit instructions. 2022-12-30 12:41:25 -06:00
Katherine Parry
668c698bb4 removed ethe second bit from fma alignment shift 2022-12-30 12:07:44 -06:00
Ross Thompson
6ac7adbfc4 Modified IROM to return the correct offset when unaligned. 2022-12-30 11:48:40 -06:00
Katherine Parry
b146f7378e Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-12-30 11:02:04 -06:00
Ross Thompson
e0ec45489a Updated constraints to remove DivBusyE. 2022-12-30 10:51:35 -06:00
Katherine Parry
8150305919 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-12-30 09:56:35 -06:00
David Harris
919525ca17 continued simplifying integer division special cases 2022-12-30 07:40:28 -08:00
David Harris
1006305d75 started simplifying integer division special cases 2022-12-30 07:34:26 -08:00
David Harris
6ae25537ea removed duplicate quotient mux 2022-12-30 07:17:38 -08:00
David Harris
1e65bfd058 simplified sign handling mux 2022-12-30 07:10:47 -08:00
David Harris
55f25457c9 Radix 4 divsqrt 2022-12-30 07:01:44 -08:00
David Harris
2c6c3e799d Clean up sqrt preproc 2022-12-30 07:00:48 -08:00
David Harris
27588af00e Clean up sqrt initialization mux 2022-12-30 06:55:20 -08:00
David Harris
802c440254 Reduced size of preproc right shift 2022-12-30 06:47:40 -08:00
David Harris
d2273e7037 fdivsqrtpreproc shift simplification 2022-12-30 06:45:51 -08:00
David Harris
18f19ce44d fdiv cleanup, reduce number of rv32f fma_b15 tests being run to speed up regression 2022-12-30 06:40:25 -08:00
David Harris
0ecbb45b78 Fixed register timing failure on SpecialCaseM in fdivsqrt 2022-12-29 21:09:23 -08:00
Ross Thompson
5d844801d2 Fixed problems with changes to ram2p. 2022-12-29 17:13:48 -06:00
Ross Thompson
a76ea1c6aa Merge branch 'main' of github.com:davidharrishmc/riscv-wally 2022-12-29 17:07:53 -06:00
Ross Thompson
31ec70029e Re-enabled the branch predictor in rv64gc. 2022-12-29 17:07:50 -06:00
Katherine Parry
e5a76817df minor optimizations and renaming 2022-12-29 15:54:17 -06:00
Katherine Parry
a8021d7571 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-12-29 12:37:51 -06:00
David Harris
963185fb22 Clean up names and comments in divsqrt 2022-12-29 08:02:44 -08:00
David Harris
103c4b8324 Factored out hardware unique to RV64 and to IDIV 2022-12-29 07:36:26 -08:00