Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Fixed problems with changes to ram2p.

Browse Source
This commit is contained in:
Ross Thompson 2022-12-29 17:13:48 -06:00
parent a76ea1c6aa
commit 5d844801d2
6 changed files with 36 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
pipelined/src/generic/mem/ram2p1r1wb.sv
View File

@ -63,7 +63,7 @@ module ram2p1r1wb
logic [DEPTH-1:0] ra1q, wa2q;
logic wen2q;
logic [width-1:0] wd2q;
logic [WIDTH-1:0] wd2q;
logic [WIDTH-1:0] mem[2**DEPTH-1:0];
logic [WIDTH-1:0] bwe;

14
pipelined/src/ifu/BTBPredictor.sv
View File

@ -105,13 +105,13 @@ module BTBPredictor
// *** optimize for byte write enables
ram2p1r1wb #(Depth, `XLEN+5) memory(.clk(clk),
.reset(reset),
.RA1(LookUpPCIndex),
.RD1({{InstrClass, TargetPC}}),
.REN1(~StallF),
.WA1(UpdatePCIndex),
.WD1({UpdateInstrClass, UpdateTarget}),
.WEN1(UpdateEN),
.BitWEN1({5'h1F, {`XLEN{1'b1}}})); // *** definitely not right.
.ra1(LookUpPCIndex),
.rd1({{InstrClass, TargetPC}}),
.ren1(~StallF),
.wa2(UpdatePCIndex),
.wd2({UpdateInstrClass, UpdateTarget}),
.wen2(UpdateEN),
.bwe2({5'h1F, {`XLEN{1'b1}}})); // *** definitely not right.
endmodule

14
pipelined/src/ifu/globalHistoryPredictor.sv
View File

@ -116,12 +116,12 @@ module globalHistoryPredictor
ram2p1r1wb #(k, 2) PHT(.clk(clk),
.reset(reset),
//.RA1(GHR[k-1:0]),
.RA1(GHRLookup),
.RD1(BPPredF),
.REN1(~StallF),
.WA1(PHTUpdateAdr),
.WD1(UpdateBPPredE),
.WEN1(PHTUpdateEN),
.BitWEN1(2'b11));
.ra1(GHRLookup),
.rd1(BPPredF),
.ren1(~StallF),
.wa2(PHTUpdateAdr),
.wd2(UpdateBPPredE),
.wen2(PHTUpdateEN),
.bwe2(2'b11));
endmodule

14
pipelined/src/ifu/gsharePredictor.sv
View File

@ -113,12 +113,12 @@ module gsharePredictor
ram2p1r1wb #(`BPRED_SIZE, 2) PHT(.clk(clk),
.reset(reset),
//.RA1(GHR[`BPRED_SIZE-1:0]),
.RA1(GHRLookup ^ PCNextF[`BPRED_SIZE:1]),
.RD1(BPPredF),
.REN1(~StallF),
.WA1(PHTUpdateAdr ^ PCE[`BPRED_SIZE:1]),
.WD1(UpdateBPPredE),
.WEN1(PHTUpdateEN),
.BitWEN1(2'b11));
.ra1(GHRLookup ^ PCNextF[`BPRED_SIZE:1]),
.rd1(BPPredF),
.ren1(~StallF),
.wa2(PHTUpdateAdr ^ PCE[`BPRED_SIZE:1]),
.wd2(UpdateBPPredE),
.wen2(PHTUpdateEN),
.bwe2(2'b11));
endmodule // gsharePredictor

14
pipelined/src/ifu/localHistoryPredictor.sv
View File

@ -86,13 +86,13 @@ module localHistoryPredictor
// LHRE refers to the address that the past k branches points to in the exectution stage
ram2p1r1wb #(k, 2) PHT(.clk(clk),
.reset(reset),
.RA1(ForwardLHRNext),
.RD1(PredictionMemory),
.REN1(~StallF),
.WA1(LHRFNext),
.WD1(UpdatePrediction),
.WEN1(UpdateEN),
.BitWEN1(2'b11));
.ra1(ForwardLHRNext),
.rd1(PredictionMemory),
.ren1(~StallF),
.wa2(LHRFNext),
.wd2(UpdatePrediction),
.wen2(UpdateEN),
.bwe2(2'b11));

14
pipelined/src/ifu/twoBitPredictor.sv
View File

@ -62,13 +62,13 @@ module twoBitPredictor
ram2p1r1wb #(Depth, 2) PHT(.clk(clk),
.reset(reset),
.RA1(LookUpPCIndex),
.RD1(PredictionMemory),
.REN1(~StallF),
.WA1(UpdatePCIndex),
.WD1(UpdatePrediction),
.WEN1(UpdateEN),
.BitWEN1(2'b11));
.ra1(LookUpPCIndex),
.rd1(PredictionMemory),
.ren1(~StallF),
.wa2(UpdatePCIndex),
.wd2(UpdatePrediction),
.wen2(UpdateEN),
.bwe2(2'b11));
// need to forward when updating to the same address as reading.
// first we compare to see if the update and lookup addreses are the same