Ross Thompson
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af0e33209f
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Removed QEMU from configurations.
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2023-07-19 10:23:55 -05:00 |
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Ross Thompson
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6572b34751
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-07-18 17:16:33 -05:00 |
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Ross Thompson
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b756b248b4
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Wow. The newest version of Vivado does not like the enums as parameters.
The solution is simple. I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
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2023-07-18 15:07:10 -05:00 |
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Ross Thompson
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026570d3da
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Added new submodule for digilent fpga boards.
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2023-07-17 16:25:37 -05:00 |
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Ross Thompson
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5bc7e251fa
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Merge branch 'main' of github.com:ross144/cvw
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2023-07-17 16:01:05 -05:00 |
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Ross Thompson
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d1ea52f6ea
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Added artya7 device tree.
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2023-07-17 16:01:02 -05:00 |
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Ross Thompson
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6a2b752fc0
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Updated arty a7 fpga top.
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2023-07-17 15:55:57 -05:00 |
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Ross Thompson
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42e6364b3d
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Merge branch 'main' of github.com:ross144/cvw
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2023-07-17 15:52:27 -05:00 |
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Ross Thompson
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c82638774f
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Updated the FPGA zero stage bootloader.
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2023-07-17 15:52:13 -05:00 |
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David Harris
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3dde7c59a8
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Merge pull request #363 from ross144/main
Fixed over logging issue with icache and dcache loggers.
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2023-07-15 06:19:11 -07:00 |
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Ross Thompson
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50bc679fef
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Fixed bug with performance counters not tracking the correct number of requested icache and dcache memory operations.
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2023-07-14 16:31:44 -05:00 |
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Ross Thompson
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59022099c7
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Fixed the icache and dcache overlogging issue.
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2023-07-14 15:47:05 -05:00 |
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Ross Thompson
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141c1b9dfb
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Somehow the Arty A7 device tree was missing.
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2023-07-13 14:10:45 -05:00 |
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Ross Thompson
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da7c6d33cd
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-07-13 11:26:49 -05:00 |
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Ross Thompson
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f851245a95
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Merge pull request #361 from davidharrishmc/dev
Clean up privilege rs1 decoding and implement svinval as sfence.vma
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2023-07-13 12:26:30 -04:00 |
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David Harris
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644afa16cd
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Clean up privilege rs1 decoding and implement svinval as sfence.vma
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2023-07-13 02:41:17 -07:00 |
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David Harris
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b65d43f59b
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Merge pull request #360 from ross144/main
Fixed the privilege decoder bug which prevented the fpga linux boot.
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2023-07-13 01:40:28 -07:00 |
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Ross Thompson
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9533dee300
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Got xcelium running wally, but it fails to actually preload the memories.
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2023-07-12 13:56:57 -05:00 |
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Ross Thompson
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33d8e5687e
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Merge branch 'main' of github.com:ross144/cvw
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2023-07-11 15:09:07 -05:00 |
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Ross Thompson
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99073a70c0
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Added wfi and interrupt to tracer.
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2023-07-11 15:09:04 -05:00 |
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Ross Thompson
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625192d9a4
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Merge branch 'main' of github.com:ross144/cvw into main
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2023-07-11 15:08:26 -05:00 |
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Ross Thompson
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38f32805ae
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Created separate temporary testbench for xcelium.
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2023-07-11 15:07:33 -05:00 |
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Ross Thompson
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4653f8e704
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Simplificaiton of function tracker.
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2023-07-11 10:51:17 -05:00 |
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Ross Thompson
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4c4eb080ee
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RTL changes for Xcelium.
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2023-07-11 10:51:02 -05:00 |
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Ross Thompson
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12beada55b
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Fixed the privilege decoder bug which prevented the fpga linux boot.
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2023-07-10 17:00:06 -05:00 |
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Ross Thompson
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beaec570c7
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Merge pull request #359 from davidharrishmc/dev
CSR updates
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2023-07-10 13:16:57 -04:00 |
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David Harris
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e713ba8d3e
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MENVCFG only exists if U_SUPPORTED
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2023-07-09 18:25:07 -07:00 |
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David Harris
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4faf7c2ac6
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Merge pull request #358 from ross144/main
Fixes the FPGA linux boot after parameterization. Note commit 15314a9c breaks the FPGA again
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2023-07-07 17:09:57 -07:00 |
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Ross Thompson
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27f6f00402
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Changes for xcelium.
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2023-07-07 18:22:28 -05:00 |
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Ross Thompson
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9a49ec0b98
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Removed duplicate signal name from testbench.
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2023-07-07 16:34:08 -05:00 |
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Ross Thompson
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cb22463763
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Fixed slight bug in config from parameterization.
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2023-07-07 16:33:34 -05:00 |
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Ross Thompson
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235546fa06
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Merge branch 'main' of github.com:ross144/cvw
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2023-07-07 13:25:00 -05:00 |
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Ross Thompson
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cdf73d3b51
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Updated comments.
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2023-07-06 15:24:26 -05:00 |
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Ross Thompson
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e4555dc4af
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Removed unused parameter.
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2023-07-06 14:57:07 -05:00 |
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Ross Thompson
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2ce8b66574
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Merge branch 'main' of https://github.com/openhwgroup/cvw
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2023-07-06 14:55:43 -05:00 |
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David Harris
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369e8fb5ec
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Removed outdated commment about endianness
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2023-07-06 12:41:46 -07:00 |
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David Harris
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869a7cb827
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Removed MTINST, which is not used in a system without a hypervisor
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2023-07-06 12:40:53 -07:00 |
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Ross Thompson
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a963e50e88
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It's a bit hacky, but the plic now passes the regression test and should be compatible with the fpga.
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2023-07-06 14:07:37 -05:00 |
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Ross Thompson
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df56ff73c0
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This is at least functionally correct, but has verilator lint issues.
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2023-07-06 11:53:34 -05:00 |
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Ross Thompson
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c000366d3e
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closer, but the wally32/64priv tests are failing.
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2023-07-05 17:47:38 -05:00 |
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Ross Thompson
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98147e116a
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Partially solved fpga boot.
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2023-07-05 17:30:55 -05:00 |
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Ross Thompson
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6a2eca5657
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Merge pull request #355 from davidharrishmc/dev
Decoder improvements
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2023-07-05 00:08:49 -04:00 |
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David Harris
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269bb688ea
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Fixed comment typo
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2023-07-04 11:34:58 -07:00 |
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David Harris
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b04763bcf2
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Commented SVADU requirements for wally32priv mmu tests
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2023-07-04 11:34:07 -07:00 |
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David Harris
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410ef01627
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fixed spacing in fdivsqrt
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2023-07-04 11:27:36 -07:00 |
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David Harris
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001d3cfdc5
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Added logic to warn about x in memory reads. Added cbo instruction names to testbench decoder
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2023-07-02 13:29:27 -07:00 |
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David Harris
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afe66d0ee4
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Added prefetch instructions; sent cbo instructions to LSU
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2023-07-02 10:55:35 -07:00 |
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David Harris
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723b8266cb
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Added prefetch signals
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2023-07-02 10:06:58 -07:00 |
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David Harris
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482e4e6e92
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Enhanced decoder to produce individual CMOpE output for the 4 CMO instructions
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2023-07-02 09:35:05 -07:00 |
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David Harris
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c48283801a
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Fixed csr typos
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2023-07-02 02:01:40 -07:00 |
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