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eroom1966
9ddfe52c9f Fix MISA RO and UART addresses 
It appears on inspection that the MISA register is read only in Wally
In which case this has now also been set in the ImperasDV representation
Also the Addresss for the UART R/W privileges are corrected
 2023-03-13 11:07:19 +00:00
Ross Thompson
e4f35a768d Merge pull request #137 from davidharrishmc/dev 
Fixes to wally-batch for coverage
 2023-03-10 15:36:24 -06:00
David Harris
1d2c8e1da3 Fixes to wally-batch for coverage 2023-03-10 13:33:32 -08:00
Ross Thompson
9250c7b2de Merge pull request #136 from davidharrishmc/dev 
Bug fix in wally-regression
 2023-03-10 15:11:25 -06:00
David Harris
005ca9650b Fixed crash with wrong number of arguments for coverage in regression-wally 2023-03-10 13:10:28 -08:00
David Harris
f411803bc4 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-10 12:47:30 -08:00
David Harris
ee1b1fbd17 Removed unneeded echo from setup 2023-03-10 12:08:24 -08:00
David Harris
b202fa0448 Merge pull request #135 from eroom1966/main 
Enhancements to support the PMA ranges
 2023-03-10 06:13:33 -08:00
eroom1966
0233130d9c Enhancements to support the PMA ranges 2023-03-10 14:09:22 +00:00
David Harris
b19aeab5c6 Merge pull request #134 from ross144/main 
Updated testbench to report performance coutners for coremark.
 2023-03-09 16:09:03 -08:00
David Harris
e3751e3a26 Modified regression and wally-batch.do to support -coverage 2023-03-09 15:59:57 -08:00
David Harris
d139ee77c3 Modified setup to add Imperas/scripts/cvw to path 2023-03-09 15:59:28 -08:00
David Harris
33fa7e4706 Simplified SLT and SLTU code in ALU 2023-03-09 15:14:52 -08:00
Ross Thompson
68b437ce92 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-09 13:29:38 -06:00
Ross Thompson
4db17cde2f Updated testbench to record coremark performance counters. 
Added comment about mtval probably not being correct for compressed instructions.
 2023-03-08 17:11:27 -06:00
David Harris
3bd599d440 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-08 10:37:28 -08:00
David Harris
283e92b0e1 Merge pull request #133 from eroom1966/main 
Add support for setting PMP registers + Async DV
 2023-03-08 05:17:45 -08:00
eroom1966
39ac3cd18f Add support for setting PMP registers 
Add support for async DV
 2023-03-08 12:44:53 +00:00
David Harris
88c3a61cd7 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-07 14:49:23 -08:00
David Harris
96e1277f7f Merge pull request #127 from kipmacsaigoren/priv-tests 
Added full testing support for S time interrupts
 2023-03-07 14:49:12 -08:00
kipmacsaigoren
24f0f34aff Merge branch 'openhwgroup:main' into priv-tests 2023-03-07 13:46:55 -08:00
David Harris
e15058a721 Merge pull request #130 from ross144/main 
change signal names to match book.
 2023-03-07 09:38:35 -08:00
Ross Thompson
f067935eed Added Yujun Lin's branch predictor simulator. This is a C baseline module for common branch predictor algorithms. 2023-03-07 10:49:59 -06:00
David Harris
d9516acd46 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-07 06:31:44 -08:00
David Harris
77ba71be71 editorconfig to specify tabs/spaces. Fixed some tabs. Turn off coverage to speed up simulation 2023-03-07 06:31:40 -08:00
Ross Thompson
6d4e28fdf2 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-06 22:29:27 -06:00
Ross Thompson
610546f195 Merge pull request #129 from davidharrishmc/dev 
Further illegal instruction detection
 2023-03-06 22:29:11 -06:00
Ross Thompson
e448cd54ef Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-06 18:39:15 -06:00
Ross Thompson
a6b851a672 Renamed signals to be consistent with textbook. 2023-03-06 18:29:31 -06:00
Ross Thompson
31fcc0daf7 Renamed PCFSpill to PCSpillF. 2023-03-06 17:50:57 -06:00
Ross Thompson
473ed2b475 Renamed InstrFirstHalf to InstrFirstHalfF. 2023-03-06 17:48:57 -06:00
Ross Thompson
fdfb80a818 Renamed ebuarbfsm to ebufsmarb to match figures. 2023-03-06 17:47:55 -06:00
David Harris
7ecf4cdea8 Fixed bug about rv64 shifts only using 6 bits of funct7 2023-03-06 13:10:51 -08:00
David Harris
7e0c96cdcc Simplified decoder default to illegal instruction 2023-03-06 11:21:11 -08:00
David Harris
c2efdbdbbb More detailed decoding of load/store/branch/jump 2023-03-06 11:15:48 -08:00
Ross Thompson
be0318209e Updated fpga ila script. 2023-03-06 13:14:48 -06:00
Ross Thompson
00647b4612 Merge pull request #128 from davidharrishmc/dev 
Detecting illegal instructions with controller
 2023-03-06 13:10:31 -06:00
David Harris
54f53ca843 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-06 11:02:48 -08:00
David Harris
a56557d847 Improved decoding illegal instructions in controller 2023-03-06 11:02:42 -08:00
Ross Thompson
7b1b65e860 Working batch mode branch prediction simulations. 2023-03-04 17:59:16 -06:00
Kip Macsai-Goren
db6caedfec added in the CSR name for stimecmp(h) 2023-03-04 15:53:03 -08:00
Kip Macsai-Goren
ab6b953a4b removed changes to counteren from stimecmp tests 2023-03-04 15:46:57 -08:00
Kip Macsai-Goren
75f6e9eb34 added S time compare to gc configs 2023-03-04 15:46:26 -08:00
Ross Thompson
6766ecc28e Mostly working bpred launch script. 2023-03-04 17:20:45 -06:00
Ross Thompson
e9fa234410 Partial automation of branch predictor embenching. 2023-03-04 17:10:58 -06:00
Kip Macsai-Goren
a38f7cc8a1 added reset values to stime and stimecmp registers 2023-03-04 15:06:15 -08:00
Kip Macsai-Goren
ac5c53a870 Added correct causing and handling of S time interrupts to test suite. 2023-03-04 15:04:17 -08:00
Ross Thompson
93f2bacdae Updated parsing script. 2023-03-04 13:45:15 -06:00
David Harris
3678ab556c Removed unneeded diagnostic print 2023-03-03 16:46:16 -08:00
Ross Thompson
da74ed0369 Merge pull request #126 from davidharrishmc/dev 
ImperasDV setup
 2023-03-03 18:01:32 -06:00