136 Commits

Author	SHA1	Message	Date
Jordan Carlin	8633f263a2	Complete coverage of tlb camlines in IFU	2024-02-01 20:41:05 -08:00
Rose Thompson	87d91c5b14	Coverage updates.	2024-02-01 12:12:01 -06:00
Rose Thompson	ccf61853cf	New coverage for ebu.	2024-01-31 14:55:25 -06:00
Rose Thompson	07d1a4104a	Improvement to ebu coverage. ... Also modified object dumps to include data segments.	2024-01-31 14:03:27 -06:00
David Harris	45e2317636	Added Wally github address to header comments	2024-01-29 05:38:11 -08:00
David Harris	3620a10c0b	Improved hptw and I CacheWays coverage	2024-01-26 14:55:51 -08:00
David Harris	1c1d3eb956	HPTW coverage improvements	2024-01-26 10:46:38 -08:00
David Harris	2449e06e55	Fixed FPU coverage, solved Issue 596 by misaligned AMO throwing access fault when misaligned non-amo are supported	2024-01-25 21:03:41 -08:00
David Harris	0e1c53f9f6	Fixed tlbmisc testing with PBMTE = 0	2024-01-24 12:24:33 -08:00
David Harris	66a1edb261	More coverage touchup	2024-01-23 23:11:49 -08:00
David Harris	7215f48dda	coverage improvements: fixing problems running ImperasDV on coverage tests	2024-01-23 22:21:01 -08:00
David Harris	d5f497eec5	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2024-01-22 09:56:50 -08:00
Jordan Carlin	0c13e14bbf	coverage improvements for mret when mpp = 3; update imperas config	2024-01-22 09:52:58 -08:00
David Harris	4ffa5e7b0a	Coverage improvements	2024-01-22 09:49:24 -08:00
Jordan Carlin	4936496bb9	fix sfence.inval.ir and sret coverage from previous PR	2024-01-22 08:58:31 -08:00
David Harris	171430a695	FPU and PMP tests	2024-01-21 14:41:22 -08:00
David Harris	ff055c404c	fpu coverage improvements	2024-01-21 13:17:56 -08:00
David Harris	69218b4b86	Coverage improvements	2024-01-21 10:03:07 -08:00
Jordan Carlin	82d9467eea	Add coverage of FIOM in different privelege modes	2024-01-18 19:29:16 -08:00
Jordan Carlin	12b2baff82	add coverage of sfence.inval.ir instruction and fix sret coverage	2024-01-18 17:33:59 -08:00
David Harris	f8c88a398a	Coverage improvements	2024-01-15 07:16:41 -08:00
Jordan Carlin	6c797570fa	Add coverage for all Zcb instructions	2024-01-12 19:10:13 -08:00
David Harris	ba7e017bd9	Added Zcb c.lbu coverage test	2024-01-10 10:01:46 -08:00
David Harris	0781cd4a44	Improved tlbcontrol to fault on R=0,W=1; fixed more coverage testsin tlbmisc.S; changed integer type to try to speed up CoreMark; comments in Verilate	2024-01-05 22:45:15 -08:00
David Harris	680a014876	Finished LSU tlbcontrol coverage tests	2024-01-02 10:16:20 -08:00
David Harris	d229dc06ee	Coverage improvements; remove incorrect logic checking NAPOT nonleaf PTE	2024-01-02 00:35:17 -08:00
David Harris	b025cd8a0d	Updated tlbNAPOT to test instructions as well	2023-12-20 23:01:35 -08:00
David Harris	9ced88c55c	Fixed tlbNAPOT test to run and makefile to gather coverage stats	2023-12-20 21:45:14 -08:00
David Harris	9747d122d2	tlbNAPOT hangs due to PBMT making instruction memory uncacheable, and spill logic not working there. Fixed TLBLRU to update recently used on TLBHit rather than CAMHit. Moved coverage exclusions to proper line in pmachecker	2023-09-02 12:56:36 -07:00
David Harris	e75ceb044f	Improved tlb and controller coverage; fixed exclusions on broken lines	2023-08-31 00:27:47 -07:00
David Harris	1642ad2bad	Improved NAPOT test coverage	2023-08-30 21:04:36 -07:00
David Harris	91429f3f02	Initial TLB NAPOT tests	2023-08-29 12:39:24 -07:00
David Harris	c45fbe1ffe	Merge pull request #394 from harshinisrinath1001/main ... Improved testing of csri with priv.S!	2023-08-24 19:16:50 -07:00
harshinisrinath	c9112ff18d	Improved testing of csri with priv.S	2023-08-24 18:39:15 -07:00
David Harris	409abbf443	Merge pull request #381 from harshinisrinath1001/main ... Tried to improve coverage of CSRI with priv.S	2023-08-21 13:28:39 -07:00
harshinisrinath	3d3d15077b	cleared stimer interrupt	2023-08-20 15:42:27 -07:00
harshinisrinath	fdb7abec06	tried to improve testing of csri in privileged module	2023-08-20 15:40:02 -07:00
David Harris	2738423441	Improved CSRU coverage with priv.S	2023-08-20 12:49:31 -07:00
harshinisrinath	7494ce06eb	wrote testcase to write into FSCR	2023-08-20 12:10:08 -07:00
harshinisrinath	b4cfdf3393	Fixed bug and tried to reset menvcfg to improve testing of csri in priv.	2023-07-30 16:40:06 -07:00
harshinisrinath	f9d3944cc5	Improved testing of pmd in priv.	2023-06-16 17:13:54 -07:00
harshinisrinath	d018357914	Improve test coverage on ieu fw.	2023-06-16 16:09:48 -07:00
David Harris	f68b9c224a	Fixed WALLY-trap test case to use menvcfg	2023-06-09 15:24:26 -07:00
James Stine	ac3253203d	Update fcvt tests for l.s/lu.s and s.l/s.lu that were missing	2023-06-05 11:03:59 -05:00
Kevin Thomas	0c9b7dcce7	Comment tlbGBL more discriptively ... Reduce redundant instructions	2023-05-04 19:13:47 -05:00
David Harris	ec3518673e	Merge branch 'main' into main	2023-04-28 07:51:32 -07:00
Liam Chalk	028d19bbfa	Merge branch 'main' into main	2023-04-27 21:49:01 -07:00
Kevin Wan	39c9cd5ee9	added tests for pmppriority module	2023-04-27 16:12:43 -07:00
David Harris	15fb5fa2ac	Update tlbASID.S ... fixed comment about restoring ASID to 0	2023-04-27 14:32:57 -07:00
Noah Limpert	4ec31de316	complete camline coverage on IFU and LSU	2023-04-27 14:26:10 -07:00