we're not sure if this is a good idea, but for now, we broke things up into 3 seperate
files, each read seperately. One for pc and instructions, one for registers, and one for
memory reads. Each is scrolled through essentially independantly: new pc data is read and checked
whenever pc changes, new register data is checked whenever any register changes, and a new mem
read value is gotten whenever DataAdrM or MemRWM changes and MemRWM is not zero. I'm not super
sure about the last one. Currently it looks like things should be working, but it goes wrong after,
like, 3 instructions.
- Copy bare-bones testbench from E85
- have testbench instantiate a wallypipelinedhart so we can simulate memory/peripherals easier
- Create .gitignore for vsim files
- Make PC reset a macro, change to 0x1000 to conform to the bootloader
I don't know a good way to put the linux register trace file we're generating on git,
since its both nontrivial to make and way to big to keep in a git repo
for now it lives in /mnt/scratch/riscv_testbench/
