David Harris
654cafb7f7
Fixed Questa warnings in plic_apb about part select out of bounds
2023-07-30 01:54:41 -07:00
Ross Thompson
15dc76310e
Fixed lint errors for issue #368 . Does not fix simulation errors. We made a design decision a long time ago to not support DTIM on the rv32gc config because LLEN was greater than XLEN.
2023-07-26 15:08:01 -05:00
Ross Thompson
2dac02c14c
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-07-25 15:13:07 -05:00
David Harris
ca62487e4c
Formatting cleanup
2023-07-25 05:11:38 -07:00
Ross Thompson
b1f7a5768f
Removed all old references to the old flash card controller.
...
Added git submodule for the flash card in addins.
Replicated flash card top level for our changes into the fpga/src directory.
2023-07-24 15:45:57 -05:00
Ross Thompson
63afd95ad3
Fixed bugs in boot and new flash card merge. Works with arty a7 now.
2023-07-22 15:52:25 -05:00
Ross Thompson
a89a1e675c
Merge branch 'boot' into mergeBoot
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Merges Jacob's new sdc controller into wally.
2023-07-21 17:43:45 -05:00
Ross Thompson
f895898d22
Improved the critical path even more. The Arty A7 works upto 19Mhz easily. Testing out 22Mhz now.
2023-07-21 16:31:26 -05:00
Ross Thompson
d04d2afed2
Modified the LSU/IFU and caches to improve critical path. Arty A7 went from 15 to 17Mhz. I believe we can push all the way to 20+Mhz with relatively little effort. Along the way I'm fixing up the scripts build the linux images for the flash card.
2023-07-21 13:06:27 -05:00
Jacob Pease
380d96b359
Working new boot process. Buildroot package for sdc.
2023-07-20 14:15:59 -05:00
Ross Thompson
c0966c32e5
Improved critical path.
2023-07-19 14:59:37 -05:00
Ross Thompson
538efaf771
Optimized critial path in ifu's spill logic.
2023-07-19 14:13:46 -05:00
Ross Thompson
af0e33209f
Removed QEMU from configurations.
2023-07-19 10:23:55 -05:00
Ross Thompson
b756b248b4
Wow. The newest version of Vivado does not like the enums as parameters.
...
The solution is simple. I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
2023-07-18 15:07:10 -05:00
Ross Thompson
42e6364b3d
Merge branch 'main' of github.com:ross144/cvw
2023-07-17 15:52:27 -05:00
Ross Thompson
c82638774f
Updated the FPGA zero stage bootloader.
2023-07-17 15:52:13 -05:00
Ross Thompson
50bc679fef
Fixed bug with performance counters not tracking the correct number of requested icache and dcache memory operations.
2023-07-14 16:31:44 -05:00
Jacob Pease
b3aaa87cba
Modified bootloader to access GUID partitions. SDC interrupt to PLIC.
...
Since writing an SD card image generation script, the bootloader
needed to be altered to access individual binaries from specific
partitions. A new file, gpt.c with it's header gpt.h, have been added
to the bootloader to facilitate this.
The SDC has been added to the device tree for the VCU108
board. Additionally the SDC interrupt signal was added to the PLIC
node in the device tree. The PLIC itself was modified to accept the
SDC interrupt signal.
2023-07-14 13:36:44 -05:00
David Harris
644afa16cd
Clean up privilege rs1 decoding and implement svinval as sfence.vma
2023-07-13 02:41:17 -07:00
Ross Thompson
625192d9a4
Merge branch 'main' of github.com:ross144/cvw into main
2023-07-11 15:08:26 -05:00
Ross Thompson
38f32805ae
Created separate temporary testbench for xcelium.
2023-07-11 15:07:33 -05:00
Ross Thompson
4c4eb080ee
RTL changes for Xcelium.
2023-07-11 10:51:02 -05:00
Ross Thompson
12beada55b
Fixed the privilege decoder bug which prevented the fpga linux boot.
2023-07-10 17:00:06 -05:00
Ross Thompson
beaec570c7
Merge pull request #359 from davidharrishmc/dev
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CSR updates
2023-07-10 13:16:57 -04:00
David Harris
e713ba8d3e
MENVCFG only exists if U_SUPPORTED
2023-07-09 18:25:07 -07:00
Ross Thompson
27f6f00402
Changes for xcelium.
2023-07-07 18:22:28 -05:00
Ross Thompson
cdf73d3b51
Updated comments.
2023-07-06 15:24:26 -05:00
Ross Thompson
e4555dc4af
Removed unused parameter.
2023-07-06 14:57:07 -05:00
Ross Thompson
2ce8b66574
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-07-06 14:55:43 -05:00
David Harris
369e8fb5ec
Removed outdated commment about endianness
2023-07-06 12:41:46 -07:00
David Harris
869a7cb827
Removed MTINST, which is not used in a system without a hypervisor
2023-07-06 12:40:53 -07:00
Ross Thompson
a963e50e88
It's a bit hacky, but the plic now passes the regression test and should be compatible with the fpga.
2023-07-06 14:07:37 -05:00
Ross Thompson
df56ff73c0
This is at least functionally correct, but has verilator lint issues.
2023-07-06 11:53:34 -05:00
Ross Thompson
c000366d3e
closer, but the wally32/64priv tests are failing.
2023-07-05 17:47:38 -05:00
Ross Thompson
98147e116a
Partially solved fpga boot.
2023-07-05 17:30:55 -05:00
David Harris
269bb688ea
Fixed comment typo
2023-07-04 11:34:58 -07:00
David Harris
410ef01627
fixed spacing in fdivsqrt
2023-07-04 11:27:36 -07:00
David Harris
afe66d0ee4
Added prefetch instructions; sent cbo instructions to LSU
2023-07-02 10:55:35 -07:00
David Harris
723b8266cb
Added prefetch signals
2023-07-02 10:06:58 -07:00
David Harris
482e4e6e92
Enhanced decoder to produce individual CMOpE output for the 4 CMO instructions
2023-07-02 09:35:05 -07:00
David Harris
c48283801a
Fixed csr typos
2023-07-02 02:01:40 -07:00
David Harris
61208e486c
Fixed ENVCFG to reply on both MENVCFG and SENVCFG when in user mode
2023-07-02 02:00:27 -07:00
David Harris
b6ae5661b4
Added environment configuration control (menvcfg/senvcfg) of cbo instructions
2023-07-02 01:52:25 -07:00
David Harris
15314a9c9a
Gated floating-point load/stores with STATUS_FS and added initial decoding for Cache Management Operations
2023-07-02 00:34:30 -07:00
David Harris
41e9f20943
improved decoder checking atomic and RW and MW and privileged instructions
2023-07-02 00:02:03 -07:00
David Harris
e34ef4d636
improved decoder checking atomic instructions
2023-07-01 23:10:57 -07:00
David Harris
d930be332e
Improved instruction decoding for illegal floating-point loads/stores and fences
2023-07-01 22:48:04 -07:00
Ross Thompson
f5cee3fb66
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-06-18 16:37:19 -05:00
David Harris
c383407d5c
Removed redundant and not-covered atomic check from StoreStallD
2023-06-16 16:05:53 -07:00
Ross Thompson
c44d4321fb
FPGA synthesis is broken. This commit moves closer to fixing the issues causes by parameterization.
2023-06-16 15:40:13 -05:00
