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Author	SHA1	Message	Date
Rose Thompson	4fc7516694	Created test to show TLB misses supress misaligned faults. Test first ... checks cached accesses which should not cause misaligned faults and then uses PBMT to disable cachablity.	2024-09-30 16:39:59 -05:00
Rose Thompson	8288870128	Merge branch 'main' of https://github.com/openhwgroup/cvw	2024-09-30 15:57:21 -05:00
Rose Thompson	2112c705a4	Supress misaligned faults during a tlb miss. Still needs to be tested.	2024-09-30 15:55:46 -05:00
David Harris	07410dff5c	Merge pull request #973 from jordancarlin/arch-test-update ... Test and Makefile Updates	2024-09-30 05:27:34 -07:00
Jordan Carlin	022b98a64b	Update all iterative makes to use	2024-09-29 23:14:19 -07:00
Jordan Carlin	23f037e76e	Add misaligned cjal and cjalr tests	2024-09-29 22:33:11 -07:00
Jordan Carlin	9711cc7348	Restore riscvdv make targets	2024-09-29 22:27:22 -07:00
David Harris	3eb185b2ff	Merge pull request #972 from jordancarlin/pin_gcc ... Pin GCC to 13.2.0 to avoid GCC 14 issue with Q extension	2024-09-29 19:53:16 -07:00
Jordan Carlin	1df085d613	Update README to use make --jobs in new user setup	2024-09-29 17:25:37 -07:00
Jordan Carlin	90342915af	Cleanup makefile printing	2024-09-29 17:24:24 -07:00
Jordan Carlin	4092f27b07	Fix bit-width of memfile for rv64 riscv-arch-test floating point tests	2024-09-29 17:24:08 -07:00
Jordan Carlin	8a58f9556e	Merge branch 'main' of https://github.com/openhwgroup/cvw into arch-test-update	2024-09-29 17:16:05 -07:00
Jordan Carlin	5118a1ff9f	Pin GCC to 13.2.0 to avoid GCC 14 issue with Q extension	2024-09-29 17:03:00 -07:00
Jordan Carlin	68b854fc20	Finish updating riscof and sim Makefiles to allow targets to run in parallel	2024-09-29 14:05:28 -07:00
Jordan Carlin	14d76b9189	Remove old functcov targets in Makefile	2024-09-29 10:37:08 -07:00
Jordan Carlin	8cb0c08e68	more wally-riscv-arch-test cleanup	2024-09-29 10:28:31 -07:00
Jordan Carlin	766b0a83d7	Remove wally32d tests since they are covered elsewhere now	2024-09-29 10:27:20 -07:00
Jordan Carlin	330eda243c	Remove wally32i and wally64i tests since they are covered elsewhere now	2024-09-29 10:26:08 -07:00
Jordan Carlin	8a0ca9826a	Remove wallycov64i tests	2024-09-29 10:24:09 -07:00
Jordan Carlin	4c5f397afd	Remove old testgen scripts	2024-09-29 10:22:12 -07:00
Jordan Carlin	ef442808a9	Remove old imperas tests	2024-09-29 10:18:04 -07:00
David Harris	ccc1ca6c47	Merge pull request #968 from jordancarlin/softfloat_updates ... Testfloat updates	2024-09-29 05:18:39 -07:00
Jordan Carlin	2f09369921	Merge branch 'main' of https://github.com/openhwgroup/cvw into arch-test-update	2024-09-29 01:51:22 -07:00
Jordan Carlin	7fea22e48a	Update fpcalc Makefile	2024-09-29 01:39:04 -07:00
Jordan Carlin	e3e205ad79	Update sqrttest Makefile	2024-09-29 01:35:49 -07:00
Jordan Carlin	d4788c2f6a	Update softfloat_demo Makefile	2024-09-29 01:30:37 -07:00
Jordan Carlin	4cacc6b80c	More testfloat makefile cleanup	2024-09-29 01:05:38 -07:00
Jordan Carlin	64d2c41f0f	Update gitignore	2024-09-29 01:02:06 -07:00
Jordan Carlin	716bee3d26	Restore testbench_fp to load from vectors directory	2024-09-29 00:57:41 -07:00
Jordan Carlin	a3214e1682	Remove remaining ieee derived config	2024-09-29 00:40:31 -07:00
Jordan Carlin	ad09edd17d	Remove remaining ieee testcase	2024-09-29 00:37:26 -07:00
Jordan Carlin	478ed242ad	More testfloat gen updates to switch to just riscv vectors	2024-09-29 00:32:18 -07:00
Jordan Carlin	495d1c7145	Only generate RISCV version of softfloat	2024-09-28 21:43:41 -07:00
Jordan Carlin	14b630a403	More testfloat fixups	2024-09-28 20:56:58 -07:00
Jordan Carlin	0c2ce32c56	Update fp Makefile to generate softfloat	2024-09-28 20:23:27 -07:00
Jordan Carlin	bf0c7fba95	Update fp Makefile to generate softfloat	2024-09-28 20:20:06 -07:00
Jordan Carlin	cc484c117d	Update tests.vh formatting and whitespace	2024-09-26 15:49:29 -07:00
David Harris	7f0c2662b3	Merge pull request #966 from ross144/main ... Updates wsim to fail with invalid --lockstep parameters	2024-09-26 08:48:42 -07:00
Rose Thompson	44db028b9e	Merge pull request #965 from davidharrishmc/dev ... Fixed VCS lockstep simulation with RV32GC config	2024-09-26 10:26:36 -05:00
Rose Thompson	d9719ac9a0	Updated wsim to not run with invalid --lockstep options.	2024-09-26 10:24:06 -05:00
David Harris	4528a5cebc	Issue 963: VCS rv32gc lockstep simulation	2024-09-26 08:08:59 -07:00
Jordan Carlin	788bc6d0b0	Update D fma_b15 tests based on new riscv-arch-test structure	2024-09-24 14:02:30 -07:00
Rose Thompson	1345a0f315	Merge branch 'main' of https://github.com/openhwgroup/cvw	2024-09-24 10:13:50 -05:00
Jordan Carlin	1465a9f39f	Actually update riscv-arch-test	2024-09-23 22:08:11 -07:00
Jordan Carlin	2029cb9873	Update riscv-arch-test submodule	2024-09-23 15:22:40 -07:00
David Harris	26f51328a5	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2024-09-23 11:41:25 -07:00
David Harris	468e48899a	Remove outdated code	2024-09-23 06:06:26 -07:00
David Harris	cc2a41045f	RV64 coverage configuration	2024-09-22 22:00:27 -07:00
David Harris	52ac1b142d	Merge pull request #961 from jordancarlin/testbench_fp_formatting ... Fix testbench_fp formatting	2024-09-22 21:59:27 -07:00
Jordan Carlin	4081d4de58	Replace tabs with spaces in testbench_fp	2024-09-22 21:33:08 -07:00