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354d447269
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Author SHA1 Message Date
slmnemo
354d447269 Changed testbench to use fopen instead of opening and closing uartfile whenever writing 2024-04-20 16:56:54 -07:00
slmnemo
770d918268 Split buildroot and buildrootboot into separate tests to prevent squashing. Removed extraneous comments. 2024-04-20 16:39:05 -07:00
slmnemo
04ac4007ec Updated tuple to name logfile to grepfile to better reflect purpose in regression. Added -a to grep so it works iwth binary files 2024-04-20 16:08:08 -07:00
slmnemo
6458fa5642 Merge branch 'main' of https://github.com/openhwgroup/cvw into linux_nightly 2024-04-20 14:46:35 -07:00
David Harris
f790d67aa7
Merge pull request #745 from Karl-Han/rom_wally_env 
Add getenvval for rom. Related to issue #723.
 2024-04-20 13:29:28 -07:00
David Harris
84e8d86d2a
Merge pull request #739 from Karl-Han/deriv_support 
Add extra path to search for deriv/buildroot
 2024-04-20 11:23:54 -07:00
slmnemo
9e3622b4ec Merge branch 'main' of https://github.com/openhwgroup/cvw into linux_nightly 2024-04-20 11:23:33 -07:00
Rose Thompson
408af3cac3
Merge pull request #744 from quswarabid/update_addins 
updated the submodules -> riscv-arch-tests and riscv-dv
 2024-04-18 12:31:11 -05:00
Kunlin Han
08dd2eac74 Add getenvval for rom. Related to issue #723. 2024-04-17 23:26:09 -07:00
Rose Thompson
f94aab2d0d
Merge pull request #743 from quswarabid/tb_fix_uncore 
the fix in testbench-imperas for uncore part of soc (unresolved reference)
 2024-04-17 12:56:27 -05:00
slmnemo
2b0cf90a99 Merged with merge conflict 2024-04-17 10:47:28 -07:00
slmnemo
d39f1ebefc Less hacky implementation of simulation log and searched log 2024-04-17 10:41:12 -07:00
slmnemo
b5ef66dc3c Less hacky implementation of the same method as before 2024-04-17 10:26:30 -07:00
Quswar Abid
6f16b7e0c9 updated the submodules -> riscv-arch-tests and riscv-dv 2024-04-17 10:25:36 -07:00
Kunlin Han
91a88fa46c Update sim/verilator/Makefile with more comments and merging variables. 2024-04-17 09:52:54 -07:00
Quswar Abid
1b18568d87 the fix Rose provided in meeting 2024-04-17 09:39:21 -07:00
David Harris
9a29668d1e
Merge pull request #737 from ross144/main 
Fixed code coverage for regression-wally
 2024-04-17 08:37:15 -06:00
Rose Thompson
416b138cf5
Merge pull request #740 from davidharrishmc/dev 
Simplify shiftcorrection module
 2024-04-17 09:19:30 -05:00
David Harris
7abf98cb4d Reordered coremark sweep to match text 2024-04-17 04:03:48 -07:00
David Harris
c11daf43f0 removed extranious iteration flag from makefile 2024-04-17 04:02:58 -07:00
David Harris
45c32bbcdf Fixed zbc to zbs to use full bit manipulation instructions in CoreMark 2024-04-17 04:02:06 -07:00
David Harris
5fdf8dfbec Switched back to unsigned ints for RV32 CoreMark per spec. CM/MHz rises from 3.35 to 3.36 2024-04-17 04:01:25 -07:00
David Harris
3ea16c6057 Removed note about store stall being depricated 2024-04-17 03:34:11 -07:00
David Harris
cd9c2e0e2b Updated embench Makefile to refer to generic sim, rather than modelsim 2024-04-17 03:16:01 -07:00
David Harris
0ff478d2a1 Updated CoreMark benchmark to default to rv32 for better numbers 2024-04-17 03:15:20 -07:00
David Harris
1d555cdbc3 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-04-17 03:01:14 -07:00
David Harris
db330b35b2 Removed unnecessary muxes from shiftcorrection; changed flag to --nightly in lint-wally 2024-04-16 20:57:49 -07:00
Kunlin Han
392eedb342 Update sim/verilator/Makefile with constants for simplicity. 2024-04-16 18:54:11 -07:00
Kunlin Han
6f6b1fd1fd Add extra path to search for deriv/buildroot. 2024-04-16 18:45:21 -07:00
slmnemo
48a2028891 Added --buildroot option to run a full Linux boot and search 'buildroot_uart.out' for login prompt 2024-04-16 17:27:25 -07:00
slmnemo
554f818a8c Fixed wave.do to match new conditional generate block names 2024-04-16 14:43:38 -07:00
Rose Thompson
abe7f49197
Merge pull request #736 from Karl-Han/docker 
[Hold Until PR735] Update on Docker support
 2024-04-16 15:46:03 -05:00
Rose Thompson
dd3460c1a9 Fixed makefile and regression-wally so that code coverage now works. 2024-04-16 15:44:42 -05:00
Rose Thompson
21a9ff248a Fixed regression-wally so it actually produces covereage reports. 2024-04-16 15:37:04 -05:00
Kunlin Han
9d91b9d6f2 Add support for using branch as CVW_GIT and use 1 as enable for knobs. 2024-04-16 11:58:13 -07:00
Kunlin Han
29c19d9cb4 Add system function through DPI to avoid missing support in Verilator. 2024-04-16 11:23:00 -07:00
David Harris
84a18515ac
Merge pull request #734 from ross144/main 
Patches the embench makefile to use wsim rather than wally-batch.do
 2024-04-16 11:34:14 -06:00
David Harris
135e2753ac Fixed Sail compilation 2024-04-16 10:32:43 -07:00
Rose Thompson
c160a78e8c Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-04-16 12:11:26 -05:00
Rose Thompson
2702b9f001 Patch makefile in embench to use wsim. 2024-04-16 12:10:43 -05:00
Rose Thompson
c1221e6608 Fixed insert_debug_comment.sh to work with the older version of bash. 2024-04-16 10:55:26 -05:00
David Harris
a78e6cda8a
Merge pull request #733 from ross144/main 
Fixed merge conflict bug in the last pull request.
 2024-04-16 09:34:16 -06:00
Rose Thompson
1eb1beed95 Fixed merge conflict bug in the last pull request. 2024-04-16 10:32:24 -05:00
David Harris
3c9cb9b0d5
Merge pull request #721 from stineje/main 
On some Ubuntu boxes, the path for Wally interferes with other tools.…
 2024-04-16 08:55:16 -06:00
James E. Stine
c7f177100c update path for #721 2024-04-16 09:51:24 -05:00
Rose Thompson
f612581c1d
Merge pull request #718 from Karl-Han/docker 
Putting Toolchains and Regression inside Docker with Scripts
 2024-04-16 09:10:21 -05:00
Rose Thompson
a85f55d3c7
Merge branch 'main' into docker 2024-04-16 09:10:08 -05:00
Rose Thompson
6d464157f7
Merge pull request #726 from Karl-Han/wsim_verilator 
Add Verilator to Wsim support
 2024-04-16 09:08:30 -05:00
Rose Thompson
9fe86712d8
Merge branch 'main' into wsim_verilator 2024-04-16 09:07:50 -05:00
David Harris
160162c98a
Merge pull request #728 from Karl-Han/verilator_getenv 
Add support for getenvval as wrapper for Verilator's getenv
 2024-04-15 17:55:34 -06:00