Rose Thompson
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3137fd7db2
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Resolved some of the issues with the cache simulator mismatching with Wally. The LRU was incorrectly updating it's state while the cache was stalled causin g the LRU state to be update when it should not be.
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2024-11-11 14:23:58 -06:00 |
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Rose Thompson
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de394d760f
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Merge branch 'openhwgroup:main' into main
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2024-11-07 08:56:38 -06:00 |
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Jordan Carlin
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c242558733
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Merge pull request #1069 from coreyqh/dev
Fixed fmvp.d.x bug
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2024-11-06 15:00:11 -08:00 |
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Corey Hickson
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1570a6338e
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Fixed fmvp.d.x bug
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2024-11-06 03:32:53 -08:00 |
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David Harris
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0bc34b8a06
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Merge pull request #1068 from jordancarlin/lockstep_fix
Fix imperas.ic path in wsim for non derived configs
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2024-11-06 00:54:33 -08:00 |
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Jordan Carlin
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553bc0a72d
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Fix imperas.ic path in wsim
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2024-11-05 21:08:44 -08:00 |
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Rose Thompson
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f08414bb69
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Unfortunately vcu108 spi clock is forced to run at 400KHz for now.
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2024-11-05 16:10:20 -06:00 |
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Rose Thompson
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827f986fae
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This configuration of the vcu108 actually seems to work.
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2024-11-05 16:01:08 -06:00 |
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Rose Thompson
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aaf36d11b5
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Now have the vcu108 kind of working with the new spi controller. However, it still has issues mounting the ext4 partition.
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2024-11-05 15:20:53 -06:00 |
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Jordan Carlin
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0a523cfa78
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Merge pull request #1057 from slmnemo/nightly_regression
Fixed buildroot lockstep, removed source.sh dependency in nightly build
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2024-11-04 20:14:44 -08:00 |
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slmnemo
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4e2b3cdbec
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Removed symlinks for non-buildroot derivative configs
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2024-11-04 19:34:16 -08:00 |
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Rose Thompson
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866ad88e97
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Merge pull request #1063 from JacobPease/main
Optimized SPI Logic
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2024-11-04 17:21:20 -06:00 |
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Jacob Pease
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507c1dad1c
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Removed impossible condition in receive register logic.
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2024-11-04 16:15:42 -06:00 |
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Jacob Pease
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120b21d7d5
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More SPI optimizations.
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2024-11-04 15:38:12 -06:00 |
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Jacob Pease
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745e53adf7
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-11-04 11:56:15 -06:00 |
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Jordan Carlin
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eab7435cea
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Merge pull request #1062 from rosethompson/main
Remove unused file from Linux/testvector-generation
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2024-11-04 08:40:19 -08:00 |
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Rose Thompson
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d769d47088
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Revert "Parallelized objdump and memfile gen."
This reverts commit 4a606de910.
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2024-11-04 10:15:12 -06:00 |
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Rose Thompson
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4a606de910
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Parallelized objdump and memfile gen.
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2024-11-04 09:49:12 -06:00 |
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Rose Thompson
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611a77775c
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Removed unused files form linux/testvector-generation. Only genInitMem.sh and fixBinMem.c remain. The latter could be replaced with objcopy.
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2024-11-04 09:48:04 -06:00 |
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slmnemo
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37c459ba89
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Added hardlinks to derivative configs to imperas.ic for lockstep
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2024-11-03 19:51:45 -08:00 |
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slmnemo
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d55a16b678
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Added derivative configs to imperas.ic searches
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2024-11-03 19:50:59 -08:00 |
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Jordan Carlin
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21ca72a7d0
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Merge pull request #1058 from coreyqh/dev
Fixed rmm rounding mode bug
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2024-11-03 16:16:29 -08:00 |
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Corey Hickson
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0c6e9dc770
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Fixed rmm rounding mode bug
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2024-11-03 14:21:55 -08:00 |
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slmnemo
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226170a76f
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Added symlink so Imperas.dv can load buildroot in lockstep and a corresponding waiver for buildroot in lockstep in wsim
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2024-11-03 14:00:17 -08:00 |
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slmnemo
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25ec075431
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Merge branch 'nightly_regression' of github.com:slmnemo/cvw into nightly_regression
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2024-11-03 12:56:09 -08:00 |
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slmnemo
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4cf049f83e
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Fixed dryrun not doing anything in regression-wally
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2024-11-03 12:54:24 -08:00 |
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slmnemo
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746eb67004
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Initial pass of removing pre-done source.sh dependency in nightly build
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2024-11-03 12:46:47 -08:00 |
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Jacob Pease
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e02361b1b6
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-11-03 00:35:53 -05:00 |
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Jacob Pease
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a9e6962cd4
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Removed unused signals and renamed other signals. Removed a bunch of delay counters and simply reuse one counter for all delay types. Tested on FPGA and it also passes regression.
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2024-11-03 00:35:40 -05:00 |
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David Harris
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50f153a554
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Merge pull request #1054 from jordancarlin/submodules
Fix reverted submodules
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2024-11-02 19:43:20 -07:00 |
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Jordan Carlin
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c64c6c4cf1
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Fix reverted submodules
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2024-11-02 16:09:14 -07:00 |
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Rose Thompson
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95fc05654b
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Merge pull request #1052 from JacobPease/main
Refactored SPI peripheral
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2024-11-02 14:32:50 -05:00 |
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Jacob Pease
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674d008f23
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Added headers to files.
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2024-11-02 14:31:05 -05:00 |
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Jacob Pease
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9c39371657
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Reverted bootloader optimizations to second iteration. Working on last optimization.
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2024-11-02 14:14:31 -05:00 |
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Jacob Pease
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e33c2f7a8c
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Added usage and help functions to write-bytes.sh
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2024-11-02 12:36:45 -05:00 |
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Jacob Pease
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2a8e213f20
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Wrote a script that can take hexadecimal bytes from a file and write them to an output file and an sd card.
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2024-11-02 12:33:27 -05:00 |
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Jacob Pease
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c197d4a3c6
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Cleaned up some code. Still more work to do there.
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2024-11-01 17:35:55 -05:00 |
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Jacob Pease
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e881bd3120
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Changed the condition for TransmitStart fsm to avoid edge condition.
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2024-11-01 17:04:07 -05:00 |
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Jacob Pease
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f6c289c6a2
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-11-01 16:55:08 -05:00 |
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David Harris
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0540ab1cca
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Merge pull request #1042 from rosethompson/main
Fixed FPGA build for ubuntu 24.04 and add btb trashing test
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2024-11-01 13:43:02 -07:00 |
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David Harris
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cd69f261ef
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Merge pull request #1049 from 10x-Engineers/rvvi_setup
Adding sv32 coverpoints
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2024-11-01 13:41:24 -07:00 |
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David Harris
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78666e51dd
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Merge pull request #1051 from naichewa/main
Fixed spi tests
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2024-11-01 13:41:01 -07:00 |
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Rose Thompson
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39ce773c91
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Merge branch 'openhwgroup:main' into main
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2024-11-01 15:23:37 -05:00 |
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naichewa
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4e938c14dd
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Merge branch 'openhwgroup:main' into main
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2024-11-01 13:10:17 -07:00 |
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naichewa
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3fda7ecb81
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Fix SPI regression tests
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2024-11-01 13:09:41 -07:00 |
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Jacob Pease
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669ae65c4f
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Merge branch 'main' of github.com:openhwgroup/cvw
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2024-11-01 14:03:06 -05:00 |
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Rose Thompson
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a528e59c7e
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Merge pull request #1050 from naichewa/main
Removed SPI hardware interlock test cases
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2024-11-01 13:55:14 -05:00 |
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naichewa
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960d72295c
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Removed SPI hardware interlock test cases
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2024-11-01 11:27:41 -07:00 |
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Rose Thompson
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fcf4aa60d6
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Merge branch 'openhwgroup:main' into main
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2024-11-01 13:15:37 -05:00 |
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Jacob Pease
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eddae8e1a6
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Fixed ShiftEdge and SampleEdge to not always include PhaseOneOffset. Before, it worked in simulation, but not on the FPGA.
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2024-11-01 13:02:17 -05:00 |
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