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Changed the condition for TransmitStart fsm to avoid edge condition.
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@ -273,7 +273,7 @@ module spi_apb import cvw::*; #(parameter cvw_t P) (
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READY: if (~TransmitFIFOReadEmpty & ~Transmitting) NextState = START;
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else NextState = READY;
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START: NextState = WAIT;
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WAIT: if (TransmitFIFOReadEmpty & ~Transmitting & ~TransmitRegLoaded) NextState = READY;
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WAIT: if (/*TransmitFIFOReadEmpty &*/ ~Transmitting & ~TransmitRegLoaded) NextState = READY;
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else NextState = WAIT;
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default: NextState = READY;
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endcase
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