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Merge branch 'main' of github.com:openhwgroup/cvw

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This commit is contained in:
Jacob Pease 2024-11-03 00:35:53 -05:00
commit e02361b1b6
3 changed files with 4 additions and 3 deletions
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3
.gitmodules vendored
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@ -25,9 +25,10 @@
sparseCheckout = true
path = addins/verilog-ethernet
url = https://github.com/rosethompson/verilog-ethernet.git
[submodule "cvw-arch-verif"]
[submodule "addins/cvw-arch-verif"]
path = addins/cvw-arch-verif
url = https://github.com/openhwgroup/cvw-arch-verif
ignore = dirty
[submodule "addins/riscvISACOV"]
path = addins/riscvISACOV
url = https://github.com/riscv-verification/riscvISACOV.git

2
addins/cvw-arch-verif

@ -1 +1 @@
Subproject commit 189974e497d7b8d2c08bb1d151b1ccdeaf3a64c9
Subproject commit 6d658b7b42c83fd584008d72964cc75d0876b769

2
addins/riscv-arch-test

@ -1 +1 @@
Subproject commit 7152865aca51062c87ff2cbb014e199a24bdc874
Subproject commit 3843c736e427a2b52a0d06e6220b073afa4be401