David Harris
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ffb248dc65
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Fixed issue 868 about tlbmisc.S coverage test failing due to HPTW writing wrong address when updateing A bit
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2024-07-05 21:32:57 -07:00 |
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David Harris
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0ab3f28991
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Lint cleanup
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2024-06-20 00:10:03 -07:00 |
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Ross Thompson
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91c844ca45
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Removed more *** from camline and csrc.
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2024-06-19 12:31:50 -07:00 |
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Ross Thompson
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9b6b6617af
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Cleaned up hptw.
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2024-06-19 12:02:56 -07:00 |
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Ross Thompson
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24916d42e2
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Refactored TLBMiss and TLBMissOrUpdateA(D) to simplify spill, ifu, lsu, and hptw.
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2024-06-19 11:40:02 -07:00 |
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Ross Thompson
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71f267a17a
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Added InstrUpdateDAF to the HPTW.
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2024-06-19 11:09:49 -07:00 |
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David Harris
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cb563e8018
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Clean up unused signals
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2024-06-18 08:07:14 -07:00 |
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David Harris
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c1fd7a9589
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Removed unused signals
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2024-06-18 07:28:52 -07:00 |
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David Harris
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8bae52b09d
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Lint cleanup of unused signals
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2024-06-18 06:49:17 -07:00 |
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David Harris
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3fa37b0233
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Lint cleanup
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2024-06-18 06:15:17 -07:00 |
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David Harris
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4a4bbdfc43
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More code cleanup
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2024-06-14 09:50:07 -07:00 |
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David Harris
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8f09240e6c
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Simplified outdated documentation pointers
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2024-06-14 03:42:15 -07:00 |
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David Harris
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3f195884e9
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Defined bit sizes more precisely to help VCS lint and conform to coding style
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2024-04-21 08:40:11 -07:00 |
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David Harris
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b386331cc8
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Changed '0 to 0 where possible per Chapter 4 style guidelines
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2024-03-06 05:48:17 -08:00 |
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David Harris
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86956026dc
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Further simplified subwordread muxing
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2024-03-06 04:24:31 -08:00 |
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David Harris
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90e89ced1d
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Fixes for synthesis. HPTW change will break x detection
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2024-02-26 04:20:08 -08:00 |
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harshinisrinath
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c7b647bde7
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Wrote exclusions for ifu and lsu peripherals which were always supported
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2024-02-01 17:12:33 -08:00 |
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David Harris
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45e2317636
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Added Wally github address to header comments
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2024-01-29 05:38:11 -08:00 |
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David Harris
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1c1d3eb956
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HPTW coverage improvements
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2024-01-26 10:46:38 -08:00 |
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David Harris
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2449e06e55
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Fixed FPU coverage, solved Issue 596 by misaligned AMO throwing access fault when misaligned non-amo are supported
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2024-01-25 21:03:41 -08:00 |
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David Harris
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171430a695
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FPU and PMP tests
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2024-01-21 14:41:22 -08:00 |
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David Harris
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911b400af2
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Fault on misaligned AMO
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2024-01-18 13:13:56 -08:00 |
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Rose Thompson
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e8474373e4
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Fixed it so Virtual Memory work without a D$.
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2024-01-18 09:18:17 -06:00 |
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David Harris
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67124b0c7f
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Fixed typo in declaration in tlbcontrol; escape quoted argument to Verilator; added ulimit to setup so Verilator stack is large enough
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2024-01-06 07:11:25 -08:00 |
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David Harris
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0781cd4a44
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Improved tlbcontrol to fault on R=0,W=1; fixed more coverage testsin tlbmisc.S; changed integer type to try to speed up CoreMark; comments in Verilate
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2024-01-05 22:45:15 -08:00 |
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Rose Thompson
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1f3792c823
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Fixed bug # 547, but there are other bugs which follow.
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2024-01-05 23:32:10 -06:00 |
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Rose Thompson
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edc56c669e
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Fixed bug 546. non-leaf non-zero PBMT bit raise page fault.
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2024-01-05 17:10:14 -06:00 |
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David Harris
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680a014876
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Finished LSU tlbcontrol coverage tests
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2024-01-02 10:16:20 -08:00 |
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David Harris
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d229dc06ee
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Coverage improvements; remove incorrect logic checking NAPOT nonleaf PTE
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2024-01-02 00:35:17 -08:00 |
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David Harris
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c52aef86a6
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Fixed coverage exclusions that no longer reference code properly
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2023-12-31 20:35:08 -08:00 |
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David Harris
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536539237c
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Fixed exclusion tags in pmachecker
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2023-12-31 20:20:31 -08:00 |
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David Harris
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e8df856fdb
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Renamed CMOp to CMOpM in mmu and cache
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2023-12-25 05:57:41 -08:00 |
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David Harris
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6395cd0284
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Reversed numbering of adrdecs to make it easier to add new peripherals without renumbering the old ones; update figure to match
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2023-12-21 12:29:37 -08:00 |
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Rose Thompson
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b68dd74f89
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Reverted logic to bit change.
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2023-12-20 13:16:32 -06:00 |
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Rose Thompson
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18a96740d5
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Revert RAM logic to bit change.
Added logic to hptw to prevent x propagation.
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2023-12-20 13:10:20 -06:00 |
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David Harris
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166c98b6f6
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Fixed issue 526 about WALLY-mmu-sv39-svadu-svnapot-svpbmt not checking ppn for NAPOT pages. Improved test case to check normal and malformed ppn
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2023-12-13 19:43:17 -08:00 |
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David Harris
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333e390f8d
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Test commit from dev
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2023-12-13 11:52:21 -08:00 |
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David Harris
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6c017141c5
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Renamed HADE to ADUE for Svadu
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2023-12-13 11:49:04 -08:00 |
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Rose Thompson
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f11f88ac2b
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Updates to tlb to check access permissions for cbo*
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2023-11-29 16:20:43 -06:00 |
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Rose Thompson
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f4e4aac8b5
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Added CMOp to pmp checker
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2023-11-29 16:09:31 -06:00 |
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Rose Thompson
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fc04b6f7d8
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Removed redundant ZICBOM/Z_SUPPORTED from pmachecker.
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2023-11-29 15:39:39 -06:00 |
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Rose Thompson
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053b094620
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Simpilified pmachecker for cmo.
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2023-11-29 12:26:18 -06:00 |
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Rose Thompson
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9a24a5d957
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Renamed signal in pmachecker.
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2023-11-28 00:05:12 -06:00 |
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Rose Thompson
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9290c3f957
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Added correct cbo fault behavior.
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2023-11-27 20:57:33 -06:00 |
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Rose Thompson
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beb95dd592
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Modified the pmachecker to correctly check the permissions for cmo instructions.
However this isn't fully tested.
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2023-11-27 17:44:11 -06:00 |
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Rose Thompson
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b74bfbeefd
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Merge branch 'main' into Zicclsm
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2023-11-10 16:15:32 -06:00 |
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naichewa
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a08356fdaa
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correct exclusion tags and reset testbench
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2023-11-01 10:34:39 -07:00 |
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Rose Thompson
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2241976d29
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Updated mmu to not generate trap on cacheable misaligned access when supported.
Updated tests with David's help.
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2023-10-30 18:26:11 -05:00 |
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naichewa
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d5d4f9d044
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transferred spi changes in ECA-authorized commit
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2023-10-12 13:36:57 -07:00 |
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David Harris
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19a6bbb01b
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UpdateDA cleanup: don't assert UpdateDA when there is no SVADU
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2023-10-04 09:57:13 -07:00 |
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