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Author	SHA1	Message	Date
David Harris	010038ec32	Depricate conditional generation based on A_SUPPORTED, which is now computed from ZALRSC_SUPPORTED and ZAAMO_SUPPORTED	2024-08-08 05:27:35 -07:00
David Harris	c5c49d3cc0	Fix creating cvw-arch-verif work directory	2024-08-08 05:25:28 -07:00
David Harris	2dfbfc7561	merged covergen.py	2024-08-08 05:06:47 -07:00
David Harris	935f433978	covergen store case	2024-08-08 05:04:19 -07:00
David Harris	f14d1f70e9	Merge pull request #899 from 10x-Engineers/rvvi_FC ... Adding RVVI Functional Coverage Support	2024-08-07 06:32:33 -07:00
Huda-10xe	2405b6c1e2	Adding RVVI Functional Coverage Support	2024-08-07 14:31:16 +05:00
Rose Thompson	4e4b527314	Merge pull request #897 from JacobPease/main ... New bootloader: Uses SPI to interface with SD card	2024-08-06 17:46:51 -05:00
Jacob Pease	f8f16d2d34	Added and extra header and changed the comments to be accurate in ram1p1rwbe.sv	2024-08-06 17:36:42 -05:00
Jacob Pease	89ecc10451	Added header to new bootloader files.	2024-08-06 17:28:50 -05:00
Jacob Pease	9f5c3fb66a	Removed line referring to local file in wally.tcl.	2024-08-06 17:11:08 -05:00
Jacob Pease	11ca2567b8	Merge branch 'main' of github.com:openhwgroup/cvw into spiboot	2024-08-06 17:09:39 -05:00
Jacob Pease	8b85a5c34a	SD card is now mountable on the fpga. The relevant files have been added. The most important changes are in the buildroot linux configuration and device tree.	2024-08-06 16:57:57 -05:00
Jacob Pease	173562d6f4	Added file necessary to split boot.mem into boot.mem and data.mem.	2024-08-02 15:36:06 -05:00
Jacob Pease	51f061ba35	Removed HSELEXTSDC and fixed SD card pin definitions.	2024-08-02 15:35:18 -05:00
Jacob Pease	bd07a60c07	Updated wally source files for zsbl testing.	2024-08-02 15:33:57 -05:00
Jacob Pease	2ed0b239e8	Added preload pointing to data.mem in ram1p1rwbe.sv	2024-08-02 15:21:15 -05:00
Jacob Pease	1edd5bb39e	New bootloader now works. Added special print functions and print messages. sdclk is set to 3MHz after initialization currently.	2024-08-02 15:19:52 -05:00
Jacob Pease	3fde6c13f7	Added functions to read registers and print information on failure. Also added a getTime function for a pretty boot display.	2024-08-02 15:14:30 -05:00
Jacob Pease	906fa73747	Updated formatting of gpt.c and boot.c.	2024-07-31 11:12:05 -05:00
Jacob Pease	0396181d1e	Added function to set SPI clock speed.	2024-07-31 11:00:44 -05:00
Jacob Pease	826576bfc7	Cleaned up code formatting a bit and added ability to set the SD card clock speed.	2024-07-31 10:59:41 -05:00
Jacob Pease	5d6699dc4c	Added extra UART macros and functions for code readability and the ability to print decimal numbers.	2024-07-31 10:58:15 -05:00
Jacob Pease	8a5898ebc1	Added carriage returns to line feed characters. UART messages print properly now.	2024-07-25 13:05:57 -05:00
Jacob Pease	f12319ca96	Changed formatting and added new UART divsor calculation from OpenSBI.	2024-07-25 13:04:27 -05:00
Rose Thompson	957de2e988	Merge pull request #896 from davidharrishmc/dev ... Updated ImperasTG derived config to turn off peripherals	2024-07-25 12:20:31 -05:00
David Harris	cf08d954e1	Updated ImperasTG derived config to turn off peripherals	2024-07-25 10:08:34 -07:00
Rose Thompson	2e4ca4c876	Merge pull request #895 from davidharrishmc/dev ... Fix Issue 894 about floating-point decoding of reserved rm/frm	2024-07-25 11:51:32 -05:00
David Harris	7360be1234	Legalized PMPconfig WARL	2024-07-25 09:43:54 -07:00
David Harris	c637e40058	CHeck legal rnum field when decoding aes64ks1i	2024-07-25 09:19:23 -07:00
Jacob Pease	6fc10adc25	Added ability to split boot.memfile into boot.mem and data.mem.	2024-07-25 11:19:15 -05:00
David Harris	7234abebef	Issue #894: trap on floating-point ops with reserved rounding modes: detect Zfa flt	2024-07-25 09:09:13 -07:00
David Harris	337e40ac1b	Issue #894: trap on floating-point ops with reserved rounding modes	2024-07-25 06:59:58 -07:00
Jacob Pease	02bb9b0b8b	Fixed SDCCLK name discrepency.	2024-07-24 22:48:31 -05:00
Jacob Pease	a34836c08b	Commented out references to old axi IP from wally.tcl.	2024-07-24 22:47:15 -05:00
Jacob Pease	ffec8cfb20	Removed old axi IP from fpga Makefile. Added sed for data.mem file loaded into uncore ram.	2024-07-24 22:46:24 -05:00
Jacob Pease	36d330a173	Masked lower byte when writing to DLL.	2024-07-24 22:44:27 -05:00
Jacob Pease	a97c7f0b58	Initialized UART with Arty frequency and baud rate. Will make this dynamic in the future	2024-07-24 22:43:47 -05:00
Jacob Pease	e175a41863	Added uart header to gpt.c.	2024-07-24 22:43:16 -05:00
David Harris	5ac02c79c6	Merge pull request #892 from ross144/main ... Adds synthesizable RVVI FPGA hardware	2024-07-24 12:21:36 -07:00
Rose Thompson	5a6e32576d	Fixed the reset bug in wallyTracer.	2024-07-24 13:32:46 -05:00
Rose Thompson	994386f12c	Removed unused file.	2024-07-24 13:30:25 -05:00
Rose Thompson	9053923d92	Merge branch 'main' of https://github.com/openhwgroup/cvw	2024-07-24 13:14:25 -05:00
Rose Thompson	13db14db6b	Factored out the rvvi testbench code into rvvitbwrapper.	2024-07-24 13:10:57 -05:00
Rose Thompson	c11036358a	Converted fpga's rvvi from a config option to a testbench/fpga top level parameter and is envoked by passing --rvvi to wsim.	2024-07-24 12:47:50 -05:00
Rose Thompson	fb1869fcb9	Updated verilog-ethernet to remove all verilator warnings or at least suppress them.	2024-07-24 10:13:03 -05:00
Rose Thompson	7960f26e84	Handled all remaining verilator warnings in the rvvi synth code. Now it's time to take on the verilog-ethernet warnings.	2024-07-23 17:44:37 -05:00
Rose Thompson	35efbd6a54	Changes are confirmed to work on the FPGA.	2024-07-23 17:39:38 -05:00
Jacob Pease	c18b3d814d	Fixed verilog bugs.	2024-07-23 17:26:39 -05:00
Jacob Pease	23d9c7a486	Fixed syntax bugs. inline functions are now static and in the spi.h header.	2024-07-23 17:00:32 -05:00
Rose Thompson	bfb3b63a24	Code cleanup.	2024-07-23 16:35:05 -05:00