Cedar Turek e994f26d6d simplified initU and UM logic, separated radix2/4 logic		2022-12-30 18:57:07 -08:00
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fdivsqrt	simplified initU and UM logic, separated radix2/4 logic	2022-12-30 18:57:07 -08:00
fma	removed ethe second bit from fma alignment shift	2022-12-30 12:07:44 -06:00
postproc	removed ethe second bit from fma alignment shift	2022-12-30 12:07:44 -06:00
fclassify.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
fcmp.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
fctrl.sv	Fixed floating Sqrt signal when floating point is disabled, causing REMU tohang during buildroot around 3.2M	2022-12-27 21:24:38 -08:00
fcvt.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
fhazard.sv	Removed XEnE, YEnE, and ZEnE from forward logic.	2022-12-23 14:27:03 -06:00
fpu.sv	removed ethe second bit from fma alignment shift	2022-12-30 12:07:44 -06:00
fregfile.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
fsgninj.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
normshift.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
unpack.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00
unpackinput.sv	Partitioned fdivsqrt into one module per file and added file names to opening comments	2022-09-20 03:57:57 -07:00