forked from Github_Repos/cvw
75 lines
3.4 KiB
Systemverilog
75 lines
3.4 KiB
Systemverilog
///////////////////////////////////////////
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// normshift.sv
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//
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// Written: me@KatherineParry.com
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// Modified: 7/5/2022
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//
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// Purpose: normalization shifter
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// MIT LICENSE
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this
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// software and associated documentation files (the "Software"), to deal in the Software
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// without restriction, including without limitation the rights to use, copy, modify, merge,
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// publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons
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// to whom the Software is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or
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// substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,
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// INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
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// PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
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// OR OTHER DEALINGS IN THE SOFTWARE.
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////////////////////////////////////////////////////////////////////////////////////////////////
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`include "wally-config.vh"
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// convert shift
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// fp -> int: | `XLEN zeros | Mantissa | 0's if nessisary | << CalcExp
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// process:
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// - start - CalcExp = 1 + XExp - Largest Bias
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// | `XLEN zeros | Mantissa | 0's if nessisary |
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//
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// - shift left 1 (1)
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// | `XLEN-1 zeros |bit| frac | 0's if nessisary |
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// . <- binary point
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//
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// - shift left till unbiased exponent is 0 (XExp - Largest Bias)
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// | 0's | Mantissa | 0's if nessisary |
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// | keep |
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//
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// fp -> fp:
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// - if result is denormalized or underflowed:
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// | `NF-1 zeros | Mantissa | 0's if nessisary | << NF+CalcExp-1
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// process:
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// - start
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// | mantissa | 0's |
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//
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// - shift right by NF-1 (NF-1)
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// | `NF-1 zeros | mantissa | 0's |
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//
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// - shift left by CalcExp = XExp - Largest bias + new bias
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// | 0's | mantissa | 0's |
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// | keep |
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//
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// - if the input is denormalized:
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// | lzcIn | 0's if nessisary | << ZeroCnt+1
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// - plus 1 to shift out the first 1
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//
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// int -> fp: | lzcIn | 0's if nessisary | << ZeroCnt+1
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// - plus 1 to shift out the first 1
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module normshift(
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input logic [`LOGNORMSHIFTSZ-1:0] ShiftAmt, // normalization shift count
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input logic [`NORMSHIFTSZ-1:0] ShiftIn, // is the sum zero
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output logic [`NORMSHIFTSZ-1:0] Shifted // is the sum zero
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);
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assign Shifted = ShiftIn << ShiftAmt;
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endmodule |