David Harris d58cad89a8 Replaced muxing of upper address bits with disregarding their match. Moved WriteEnables gate into tlblru to eliminate WriteLines		2021-07-06 10:38:30 -04:00
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bin	Icache integrated!	2021-04-26 11:48:58 -05:00
config	Don't generate HPTW when MEM_VIRTMEM=0	2021-07-05 23:35:44 -04:00
linux-testgen	optionally output GDB-formatted instruction list to main buildroot folder	2021-07-03 17:25:19 -04:00
misc	Clean up MMU code	2021-05-14 07:12:32 -04:00
ppa	Config file for ppa experiments	2021-03-25 10:23:21 -05:00
regression	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2021-07-05 16:07:27 -05:00
src	Replaced muxing of upper address bits with disregarding their match. Moved WriteEnables gate into tlblru to eliminate WriteLines	2021-07-06 10:38:30 -04:00
testbench	Added F_SUPPORTED flag to disable floating point unit when not in MISA	2021-07-05 10:30:46 -04:00
testgen	mcause test fixes and s-mode interrupt bugfix	2021-06-16 17:37:08 -04:00
lint-wally	Merge difficulties	2021-06-07 09:50:23 -04:00