cvw/wally-pipelined/src/ifu
2021-04-29 14:36:56 -04:00
..
bpred.sv Merge branch 'tests' into icache-almost-working 2021-04-25 21:25:36 -05:00
BTBPredictor.sv Corrected a number of bugs in the branch predictor. 2021-03-31 11:54:02 -05:00
decompress.sv Reorganized src hierarchically 2021-01-30 11:50:37 -05:00
globalHistoryPredictor.sv fixed bug in gshare, global and local history BP 2021-04-29 06:14:32 -04:00
gshare.sv fixed bug in gshare, global and local history BP 2021-04-29 06:14:32 -04:00
icache.sv Fixed issue with not saving the first cache block read on a miss spill. 2021-04-26 12:57:34 -05:00
ifu.sv Added the ability to exclude branch predictor. 2021-04-26 14:27:42 -05:00
localHistoryPredictor.sv Fix compile error in branch predictor 2021-04-29 14:36:56 -04:00
RAsPredictor.sv Corrected a number of bugs in the branch predictor. 2021-03-31 11:54:02 -05:00
satCounter2.sv We now have a solid rough draft of the 2 bit sat counter branch predictor with BTB and RAS. 2021-02-15 14:51:39 -06:00
SramModel.sv Hacked the sram memory models to reset their internal registers. This allows the simulation to run but is only temporary. 2021-02-18 21:32:15 -06:00
twoBitPredictor.sv Fixed forwarding around the 2 bit predictor. 2021-03-04 13:01:41 -06:00