forked from Github_Repos/cvw
Fixed some typos with the names of signals in the branch predictor. They were causing signals to be not set. Note there is a modelsim flag which prevents it from compiling if a logic is undefined. I will look this up and add it to the compiler. |
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.. | ||
BTBPredictor.txt | ||
regression-wally.py | ||
sim-wally | ||
sim-wally-batch | ||
twoBitPredictor.txt | ||
wally-busybear.do | ||
wally-coremark.do | ||
wally-peripherals.do | ||
wally-pipelined-batch-parallel.do | ||
wally-pipelined-batch.do | ||
wally-pipelined-ross.do | ||
wally-pipelined.do | ||
wave-all.do | ||
wave.do |