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Author SHA1 Message Date
David Harris
e61883b922 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-08 16:41:13 +00:00
David Harris
64e9f4c0d3 Restored E tests to makefrag 2022-02-08 16:41:11 +00:00
bbracker
b4d6cc49e6 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-08 16:08:04 +00:00
David Harris
f00b3ac27e Fixed TIM tests; rv32e test still failing 2022-02-08 15:24:37 +00:00
David Harris
76dccbad91 Patching up testbench; fixed false passing, but rv32ic and rv32e tests now fail 2022-02-08 12:40:02 +00:00
David Harris
c61cd55c5c Merged TIM and regular testbenches. RV32e now working and back in regression. 2022-02-08 12:18:13 +00:00
bbracker
7ea9b10309 update buildroot main.config to reflect most recent image build 2022-02-08 11:47:26 +00:00
bbracker
c12a8578a0 restore trace generation functionality for new setup 2022-02-08 11:45:42 +00:00
bbracker
b0fda60cf7 gitignore dtb's because we only care about dts's as being source files 2022-02-08 11:14:59 +00:00
bbracker
f94e5560ac add trimmed-down virt devicetree to repo for QEMU 2022-02-08 11:11:44 +00:00
David Harris
5216a96857 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-08 10:26:39 +00:00
David Harris
cbef88ec10 Lab 3 file cleanup 2022-02-08 10:26:37 +00:00
bbracker
79da6afe86 trying to move away from QEMU patches 2022-02-08 10:05:38 +00:00
bbracker
d52baa3a5c fix typo 2022-02-08 08:12:45 +00:00
bbracker
ec5423f8d6 add buildroot script 2022-02-08 08:10:32 +00:00
bbracker
23b743206a refactor buildroot-config-src into linux folder 2022-02-08 00:26:06 +00:00
bbracker
77e78363cc trim away unneeded linker and header files intended for non-spike machines from wally-riscv-arch-test 2022-02-07 23:59:47 +00:00
David Harris
99f3d7a7f6 Reverted cache change 2022-02-07 14:47:20 +00:00
David Harris
50b44b4416 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-07 14:43:31 +00:00
David Harris
45dc9c1ae6 Cache syntax cleanup 2022-02-07 14:43:24 +00:00
Kip Macsai-Goren
ddc8883ea5 fixed verify step to work correctly with comments. clarified copy references without simulating 2022-02-06 19:48:23 +00:00
Kip Macsai-Goren
0eb280b314 added new tests to make and testbench 2022-02-06 19:47:22 +00:00
Kip Macsai-Goren
5d1a0f3402 clarified csr write test 2022-02-06 19:46:29 +00:00
Kip Macsai-Goren
5ddcb29129 added CSR permission tests 2022-02-06 19:45:58 +00:00
Kip Macsai-Goren
51355abc2d light cleanup 2022-02-06 02:05:59 +00:00
Kip Macsai-Goren
07c806b02e added comments to existing MMU tests 2022-02-06 02:05:59 +00:00
Kip Macsai-Goren
e0ed4c00fc added commenting in reference outputs that aren't simulated in spike 2022-02-06 02:05:59 +00:00
Kip Macsai-Goren
1a5111fb75 Allowed commenting in signature files 2022-02-06 02:05:59 +00:00
David Harris
9b55848ffc Added E tests to wally-riscv-arch-test rv32i_m/I and fixed cyclic path in rv32e configuration 2022-02-06 01:22:40 +00:00
bbracker
f67af23bf3 remove sporadic tabs from tests.vh so that it is now only spaces 2022-02-05 23:07:38 +00:00
bbracker
74ef58e20e remove rv32e from regression because it is broken; goes with previous commit 2022-02-05 23:05:21 +00:00
bbracker
71a0d96c8d Remove rv32e tests from rv32i_m Makefrag so that make XLEN=32 works 2022-02-05 21:34:50 +00:00
David Harris
0f7b8017d1 Modified regression to use proper rv32e test name, but rv32e_wally32e still isn't passing due to loop exceeding iteration limit 2022-02-05 05:35:51 +00:00
David Harris
a9d2386010 Merged buildroot do files into wally-pipelined do files, added work suffixes so buildroot regression won't fail due to file conflicts 2022-02-05 05:28:40 +00:00
David Harris
66b4834ef5 Modified wally-pipelined-batch.do to handle buildroot 2022-02-05 05:07:07 +00:00
David Harris
72bc64ef28 Temporarily changed rv32e config to use TIM, but it still fails. Added rv32e tests. 2022-02-05 04:16:18 +00:00
David Harris
2c67f32b97 RV32e tests 2022-02-04 14:30:36 +00:00
James Stine
dae826bd75 Update synthesis script for overwrite during copy 2022-02-03 20:29:03 -06:00
David Harris
c3333150c3 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-04 01:56:36 +00:00
David Harris
fb041fe06a rv32e 2022-02-04 01:56:30 +00:00
James Stine
b96d0e7095 Update to 12T for synthesis 2022-02-03 19:42:03 -06:00
James Stine
60e19e3b67 Added the 12T submodule to the project. 2022-02-03 19:26:41 -06:00
David Harris
a7c4eb0399 Synth for 500 MHz 2022-02-04 01:06:13 +00:00
David Harris
f1c8f5dda4 ignore .sv files in synthDC/hdl 2022-02-04 00:57:13 +00:00
David Harris
ec552dff19 Adjusted synthesis to compile rv32e on 12T library 2022-02-04 00:45:16 +00:00
David Harris
c2ddb121a0 Added E tests to repo 2022-02-03 23:42:31 +00:00
David Harris
ef5af9b5fd renamed configs 2022-02-03 23:36:41 +00:00
David Harris
17277775e6 E tests 2022-02-03 22:55:55 +00:00
David Harris
ee3300bcd2 sram1rw cleanup 2022-02-03 18:03:22 +00:00
David Harris
97d31cec21 sram1rw cleanup 2022-02-03 17:50:23 +00:00