forked from Github_Repos/cvw
ignore .sv files in synthDC/hdl
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.gitignore
vendored
3
.gitignore
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@ -52,5 +52,4 @@ examples/asm/sumtest/sumtest
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examples/asm/example/example
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examples/C/sum/sum
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examples/C/fir/fir
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synthDC/hdl/*.sv
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