Cache syntax cleanup

This commit is contained in:
David Harris 2022-02-07 14:43:24 +00:00
parent 9b55848ffc
commit 45dc9c1ae6

View File

@ -180,6 +180,7 @@ module cache #(parameter LINELEN, NUMLINES, NUMWAYS, DCACHE = 1) (
mux3 #(`PA_BITS) CacheBusAdrMux(.d0({PAdr[`PA_BITS-1:OFFSETLEN], {{OFFSETLEN}{1'b0}}}),
.d1({VictimTag, PAdr[SETTOP-1:OFFSETLEN], {{OFFSETLEN}{1'b0}}}),
.d2({VictimTag, FlushAdr, {{OFFSETLEN}{1'b0}}}),
.d2({VictimTag, FlushAdr, OFFSETLEN'b0}),
.s({SelFlush, SelEvict}),
.y(CacheBusAdr));