Katherine Parry
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e42afbfb30
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paramerterized some small fma units
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2022-06-01 23:34:29 +00:00 |
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Madeleine Masser-Frye
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30f4a7e37b
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally
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2022-06-01 21:02:55 +00:00 |
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Madeleine Masser-Frye
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bed4fad7b2
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fixed errors in synth.out by switching ( to {
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2022-06-01 21:02:49 +00:00 |
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DTowersM
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215f69a2ab
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-06-01 21:00:51 +00:00 |
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DTowersM
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d28b4cf602
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added support for embench post processing to testbench.sv
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2022-06-01 21:00:44 +00:00 |
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DTowersM
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ee7070c5b6
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some changes to further support vsim on embench
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2022-06-01 17:19:19 +00:00 |
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Katherine Parry
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dd19e55b8f
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unpacker optimizations
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2022-06-01 16:52:21 +00:00 |
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slmnemo
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446ad498aa
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Fixed double assignment on LSUBurstType
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2022-06-01 01:04:49 +00:00 |
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cturek
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949f53695d
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Fixed typos
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2022-06-01 00:07:36 +00:00 |
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slmnemo
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cf05fec9c7
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Added signals to change HTRANS to the correct signal based on schematic as well as a way to tell if we are not on the first access
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2022-05-31 16:33:05 -07:00 |
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slmnemo
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a86c4d5ff3
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Merge branch 'cacheburstmode' of github.com:davidharrishmc/riscv-wally into cacheburstmode
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2022-05-31 15:57:55 -07:00 |
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slmnemo
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9ad1a42886
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Redid the FSM to prepare for burst mode implementation
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2022-05-31 15:57:42 -07:00 |
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David Harris
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475a84491e
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Unpackinput cleanup
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2022-05-31 22:31:21 +00:00 |
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David Harris
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f9533fea1a
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Removed normalized output from unpack and simplified interface
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2022-05-31 21:32:31 +00:00 |
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David Harris
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0d0a9cba66
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-31 21:12:45 +00:00 |
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David Harris
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aa7b0616e4
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../src/privileged/csrc.sv
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2022-05-31 21:12:17 +00:00 |
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DTowersM
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8903af3764
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-31 20:13:41 +00:00 |
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DTowersM
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525f6a6069
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added testbench.sv support for embench tests, test output still WIP
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2022-05-31 20:13:32 +00:00 |
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DTowersM
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0de54a01bf
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removed delapidated signals SIE_REGW SIP_REGW TimerIntM SwIntM
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2022-05-31 20:10:56 +00:00 |
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DTowersM
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95df88ae70
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added embench tests to tests.vh
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2022-05-31 20:08:04 +00:00 |
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DTowersM
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ae12cca980
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dummy start trigger and stop trigger support for make file
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2022-05-31 20:05:51 +00:00 |
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Katherine Parry
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f6ac33ce8a
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reorginized unpackinput signals
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2022-05-31 17:40:34 +00:00 |
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Katherine Parry
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4ed7933aa3
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added unpackinput.sv
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2022-05-31 16:18:50 +00:00 |
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David Harris
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1e1555891f
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-31 14:58:18 +00:00 |
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David Harris
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788fe406b5
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Moved delegation logic from privmode to trap to simplify interface
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2022-05-31 14:58:11 +00:00 |
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Madeleine Masser-Frye
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887090dbae
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plots saved to synthDC/plots instead of shown
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2022-05-30 19:56:47 +00:00 |
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Madeleine Masser-Frye
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8506d98bec
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added optimized area plotting
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2022-05-30 18:54:02 +00:00 |
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David Harris
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0cfe9e3373
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Removed unused fp add and convert modules
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2022-05-29 23:07:56 +00:00 |
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Katherine Parry
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950a17bef5
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fixed lint error
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2022-05-28 10:20:13 -07:00 |
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slmnemo
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4a8d0be32c
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Reverted commit 60e3d7d81b
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2022-05-28 04:00:01 -07:00 |
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slmnemo
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f18989e801
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Revert Commit 6c61840045
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2022-05-28 03:35:17 -07:00 |
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slmnemo
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60e3d7d81b
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Changed NO_IE_MTIME_CHECKPOINT so it uses the new parameter name
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2022-05-28 03:16:55 -07:00 |
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slmnemo
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6c61840045
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Deparametrized Linux testbench and removed mentions of parameters in wally-pipelined.do
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2022-05-28 03:14:49 -07:00 |
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slmnemo
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f78fa3b9b9
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Reverted incorrect Ack
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2022-05-28 10:06:26 +00:00 |
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David Harris
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b04e9ac1f6
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fixed merge conflicts
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2022-05-28 09:44:55 +00:00 |
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David Harris
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4237bb7abd
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Added comments to some files, added a+b = 0 detector to comparator.sv
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2022-05-28 09:41:48 +00:00 |
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Madeleine Masser-Frye
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ab0b0a0da4
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fixed normalization vertical axes, added TechSpecs type
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2022-05-28 04:57:18 +00:00 |
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Katherine Parry
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9c58c63864
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removed unused signal from FMA
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2022-05-27 16:47:56 -07:00 |
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Katherine Parry
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06d4c05b3d
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-27 14:37:34 -07:00 |
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Katherine Parry
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a0ff98042c
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unpacker adds 1 to denorm expoents
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2022-05-27 14:37:10 -07:00 |
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Madeleine Masser-Frye
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d8815a7f12
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally
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2022-05-27 20:59:27 +00:00 |
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Madeleine Masser-Frye
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7447f9fbf4
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plotting updates, normalization
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2022-05-27 20:59:23 +00:00 |
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Katherine Parry
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95b506c5e0
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some optimizations in unpacker
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2022-05-27 11:36:04 -07:00 |
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Katherine Parry
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1be91753fe
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moved lzc to generic and small optimizations on fcvt
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2022-05-27 09:04:02 -07:00 |
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Katherine Parry
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c6d79cd718
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Removed guard bit from fma rounding
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2022-05-27 08:23:46 -07:00 |
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slmnemo
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bc17f883d4
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changed ahb FSM and caught potential bug in ack/wordcountthreshold when on last word
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2022-05-26 18:41:27 -07:00 |
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DTowersM
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c371ddf420
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2022-05-26 23:36:49 +00:00 |
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DTowersM
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8299d79928
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embench addition: added options to create .elf, .objdump, .memfile, .addr and .lab files from the executible in the embench build directory
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2022-05-26 23:36:38 +00:00 |
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slmnemo
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847c7930c4
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added LSUBurstDone signal to signal when a burst has finished
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2022-05-26 16:29:13 -07:00 |
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cturek
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5a0889016c
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fixed sizing issues in expcalc
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2022-05-26 22:35:17 +00:00 |
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