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caf3c2de9b
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1546 Commits

Author SHA1 Message Date
David Harris
caf3c2de9b Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-10-10 12:25:11 -07:00
David Harris
43d92f2507 Divider cleanup 2021-10-10 12:24:44 -07:00
David Harris
6704e37597 Simplifying divider FSM 2021-10-10 12:21:43 -07:00
David Harris
4deae8019a Simplifying divider FSM 2021-10-10 12:21:36 -07:00
David Harris
2759f1fcb1 Moved & ~StallM from FSM into DivStartE 2021-10-10 11:49:32 -07:00
David Harris
635fe181f8 Moved divide iteration register names to M stage 2021-10-10 11:30:53 -07:00
David Harris
b713b6ca87 Simplified remainder for divide by 0 2021-10-10 11:20:07 -07:00
David Harris
6988c8c37c divider control signal simplificaiton 2021-10-10 10:55:02 -07:00
David Harris
c2bb0324c6 Removed negedge flops from divider 2021-10-10 10:41:13 -07:00
bbracker
2f02287f91 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-10-10 10:10:06 -07:00
bbracker
a88ae5aaff use correct string formatting function 2021-10-10 10:09:59 -07:00
David Harris
3aa9e088c8 Simplified divider sign handling 2021-10-10 08:35:26 -07:00
David Harris
39bbeefa78 renamed DivStart 2021-10-10 08:32:04 -07:00
David Harris
64ed267825 renamed DivSigned 2021-10-10 08:30:19 -07:00
Katherine Parry
77fe00947e FMA matches diagram and lint warnings fixed 2021-10-09 17:38:10 -07:00
bbracker
6fce53d146 make testbench-linux halt on some discrepancies with QEMUw 2021-10-09 17:22:30 -07:00
kipmacsaigoren
96565f9435 rename adder in fpu for synthesis 2021-10-08 17:47:54 -05:00
kipmacsaigoren
7fde7aae6e Merging new changes into the old one's I've made in the OKstate servers 2021-10-08 17:47:11 -05:00
Kip Macsai-Goren
303beaa083 updated pmp output to correspond to test changes, commented out execute tests until cache/fence interaction works fully. 2021-10-08 15:40:18 -07:00
Kip Macsai-Goren
f3058f94c6 removed loops and simplified mask generation logic. PMP's now pass my tests and linux tests up to around 300M instructions. 2021-10-08 15:33:18 -07:00
kipmacsaigoren
2d4623b49c Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-10-08 12:01:44 -05:00
David Harris
3d0383c154 moved fp vectors into vectors subdirectory 2021-10-07 23:28:06 -04:00
David Harris
6dd85b80a2 Included TestFloat and SoftFloat 2021-10-07 23:03:45 -04:00
bbracker
55f6584e62 update wave-do 2021-10-07 19:16:52 -04:00
bbracker
1824b2af13 fix div restarting bug 2021-10-07 18:55:00 -04:00
James E. Stine
28e147bb19 update scripts 2021-10-07 15:14:54 -05:00
bbracker
91d9b6800b update linker scripts to look for vmlinux files 2021-10-06 16:55:38 -04:00
James E. Stine
8429078d4f TV for conversion and compare 2021-10-06 14:38:32 -05:00
James E. Stine
199ce88b39 Add generic wave command file 2021-10-06 13:17:49 -05:00
James E. Stine
93668b5185 Update to testbench for FP stuff 2021-10-06 13:16:38 -05:00
kipmacsaigoren
8db7ce002d Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-10-06 11:52:34 -05:00
James E. Stine
2afa6e7a6e Add TV for testbenches (to be added shortly) however had to leave off fma due to size. The TV were slightly modified within TestFloat to add underscores for readability. The scripts I created to create these TV were also included 2021-10-06 08:56:01 -05:00
James E. Stine
a91c0c8fc7 Make changes to fpdiv - still working on clock issue with fsm that was changed from posedge to negedge - also updated fpdivsqrt rounding to handle testfloat 2021-10-06 08:26:09 -05:00
Skylar Litz
5bcae393c9 added delayed MIP signal 2021-10-04 18:23:31 -04:00
kipmacsaigoren
b72e94badf Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2021-10-04 12:28:03 -05:00
David Harris
36bbf0c502 Divider cleaup 2021-10-03 11:22:34 -04:00
David Harris
10ef563211 Divider cleanup 2021-10-03 11:16:48 -04:00
David Harris
78eba19a1f Replacing XE and DE with SrcAE and SrcBE in divider 2021-10-03 11:11:53 -04:00
David Harris
48e33c79a9 Reduced cycle count for DIVW/DIVUW by two 2021-10-03 09:42:22 -04:00
David Harris
648cc8ef64 Divider comments cleanup 2021-10-03 01:12:40 -04:00
David Harris
2ae51d1852 Parameterized number of bits per cycle for integer division 2021-10-03 01:10:15 -04:00
David Harris
d468357c24 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-10-03 00:43:47 -04:00
David Harris
81601e26a3 Divider cleanup 2021-10-03 00:41:41 -04:00
David Harris
c690a863b5 Added suffixes to more divider signals 2021-10-03 00:32:58 -04:00
bbracker
7fdb0158d4 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2021-10-03 00:30:49 -04:00
bbracker
bb868f7a37 checkpoint generator bugfixes 2021-10-03 00:30:04 -04:00
David Harris
0c08a7c05c More divider cleanup 2021-10-03 00:20:35 -04:00
David Harris
5e6b2490cb Eliminated extra inversion for subtraction in divider 2021-10-03 00:10:12 -04:00
David Harris
418e9cd6e6 Added more pipeline stage suffixes to divider 2021-10-03 00:06:57 -04:00
David Harris
b3bded9e6c Added more pipeline stage suffixes to divider 2021-10-02 22:54:01 -04:00