Katherine Parry
06af239e6c
FMV.D.X imperas test passes
2021-05-20 22:17:59 -04:00
bbracker
1d3db5ead5
small bit of busybear debug progress
2021-05-19 20:18:00 -04:00
James E. Stine
304e70d3ae
Update rv64icfd batch script
2021-05-18 16:01:53 -05:00
David Harris
5da159d17e
Removed rv64wally
2021-05-18 14:08:46 -04:00
David Harris
4d264c6f61
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
...
Conflicts:
wally-pipelined/regression/vish_stacktrace.vstf
2021-05-18 14:01:19 -04:00
bbracker
f00eb22700
fixed busybear floating point NOP-out feature; restored regression to check 100000 instructions
2021-05-17 19:25:54 -04:00
bbracker
e4c90f503a
regression modified to timeout after 10 min \n took Harris\' suggestion for avoiding using ahbliteState package in busybear testbench
2021-05-17 18:44:47 -04:00
David Harris
9901f54b15
Deleted vish_stacktrace
2021-05-17 18:39:01 -04:00
Elizabeth Hedenberg
b818ce608a
commit ehedenberg coremark
2021-05-17 18:02:35 -04:00
James E. Stine
3d3e3434f6
Cleanup of regression
2021-05-17 16:58:15 -05:00
James E. Stine
865b3ee219
Updates on Divide - pushed in working version of DIV64U for Divide and REmainder. Will do 32-bit version tomorrow as well as Signed version
2021-05-17 16:48:51 -05:00
Thomas Fleming
6aa04af38d
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-05-14 07:40:08 -04:00
Thomas Fleming
ea4e76938e
Remove busy-mmu and fix missing signal
2021-05-14 07:14:20 -04:00
Jarred Allen
041149eaf7
Minor fixes in regression
2021-05-09 13:57:09 -04:00
Jarred Allen
c7f400262c
Fix bug in regression script
2021-05-06 12:56:57 -04:00
Jarred Allen
be029ba02c
Clean up regression script and document it
2021-05-04 18:58:59 -04:00
Thomas Fleming
ad40464557
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-05-03 23:15:39 -04:00
Elizabeth Hedenberg
2d1d929485
coremark print statment
2021-05-03 19:35:08 -04:00
Elizabeth Hedenberg
463ba1a2be
coremark directory changes
2021-05-03 19:35:06 -04:00
Ross Thompson
82b4d42f32
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-05-03 16:56:00 -05:00
Ross Thompson
7f38056879
fixed subtle typo in icache fsm. Was messing up hit spill hit.
...
I believe the mibench qsort benchmark runs after this icache fix.
2021-05-03 16:55:36 -05:00
Thomas Fleming
ba1afec621
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-05-03 17:38:13 -04:00
Jarred Allen
7d509252a7
Add lint to regression
2021-05-03 17:32:05 -04:00
Ross Thompson
e145670b15
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-05-03 14:53:54 -05:00
Ross Thompson
19a93345b5
Reduced icache to 1 port memory.
2021-05-03 14:47:49 -05:00
Thomas Fleming
cfe64e7c24
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
...
Conflicts:
wally-pipelined/src/ebu/ahblite.sv
2021-05-03 14:02:19 -04:00
Ross Thompson
a54c231489
Eliminated extra register and fixed ports to icache.
...
Still need to support physical tag check and write in icache memory.
Still need to reduce to 1 port SRAM in icache.
I would like to refactor the icache code.
2021-05-03 12:04:54 -05:00
bbracker
9ab714e636
small rv64 plic test bugfix
2021-05-03 10:06:44 -04:00
Ross Thompson
c7b97d0339
Added back in function name to wave.do
2021-05-03 09:04:48 -05:00
Noah Boorstin
48d32c1daf
rollback regression to 400k instrs for busybear
2021-04-29 20:59:30 -04:00
Thomas Fleming
6e5fc107d9
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2021-04-29 16:30:00 -04:00
Domenico Ottolia
4fae8088e3
Add medeleg tests
2021-04-29 15:02:36 -04:00
Jarred Allen
ebd9c0ee29
Remove signal which no longer exists from default waves, so sim-wally works
2021-04-29 14:41:10 -04:00
Thomas Fleming
c62fdfb7b3
Remove unused waves from .do files
2021-04-29 02:19:46 -04:00
Thomas Fleming
18e0b353a9
Add mmu waves (commented) to busybear
2021-04-28 20:01:05 -04:00
Ross Thompson
8ae28e7887
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2021-04-26 14:28:09 -05:00
Ross Thompson
72363f5c66
Added the ability to exclude branch predictor.
2021-04-26 14:27:42 -05:00
Noah Boorstin
0324329ed9
linux: start using internal branch predictor signal
2021-04-26 14:34:38 -04:00
Noah Boorstin
ee628e388a
minor busybear fixes
2021-04-26 13:24:39 -04:00
Ross Thompson
8e5409af66
Icache integrated!
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Merge branch 'icache-almost-working' into main
2021-04-26 11:48:58 -05:00
bbracker
ba94fa3436
it says I need to merge in order to pull
2021-04-26 07:46:24 -04:00
bbracker
1cc0dcc83f
progress on bus and lrsc
2021-04-26 07:43:16 -04:00
Ross Thompson
6e803b724e
Merge branch 'tests' into icache-almost-working
2021-04-25 21:25:36 -05:00
bbracker
86946266cf
thomas fixed it before I did
2021-04-24 09:38:52 -04:00
bbracker
a3487a9e47
do script refactor
2021-04-24 09:32:09 -04:00
Ross Thompson
27ef10df07
almost working icache.
2021-04-23 16:47:23 -05:00
Jarred Allen
c91f1e197b
Remind people to run make allclean when a regression fails
2021-04-22 19:21:00 -04:00
Ross Thompson
020fb65adf
Fixed icache for 32 bit.
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Merge branch 'cache' into main
2021-04-22 16:45:29 -05:00
Ross Thompson
c42399bdb5
Yes. The hack to not repeat the d memory operation fixed this issue.
2021-04-22 15:22:56 -05:00
Jarred Allen
5df6be3ad5
Add buildroot to regression test
2021-04-22 13:34:56 -04:00
