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c694bde104
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2178 Commits

Author SHA1 Message Date
Kevin Kim
c694bde104 Merge branch 'main' of https://github.com/kipmacsaigoren/cvw 2023-02-03 18:39:26 +00:00
Kevin Kim
8c9107ffa4 arch32ba includes the 32i_m tests instead of 64 2023-02-03 17:40:02 +00:00
Kip Macsai-Goren
1096a4e2a5 Merge remote-tracking branch 'upstream/main' into main 2023-02-03 09:31:06 -08:00
Kevin Kim
c7ce9242cb Merge branch 'main' of https://github.com/kipmacsaigoren/cvw 2023-02-03 16:00:36 +00:00
Kevin Kim
ac9e672e3e ALU changes (ZBB) 
- handles inverted operand instructions
- handles shift-and-add instructions
 2023-02-03 16:00:32 +00:00
Ross Thompson
370931c1cd Fixed bug #49. 
FFLAGS was updated while the pipeline was stalled.
Also I found serveral performance counters which had similar issues.
 2023-02-03 00:39:26 -06:00
Ross Thompson
a4907b5d29 Lee Moore found another bug using imperas. 
An ITLB miss concurrent with a d cache flush did not interlock.
The LSU should suppress the d cache flush until the hptw fills the missing tlb entry.
 2023-02-02 23:52:21 -06:00
Kevin Kim
cb6e80a62b
Merge branch 'openhwgroup:main' into main 2023-02-02 21:41:55 -08:00
Kevin Kim
dd4f8c0712 Started Zbb 
-Performs byte instructions (orc.b, rev8 (32/64))
 2023-02-03 05:40:38 +00:00
Kevin Kim
ea98fdd7e4 zbs minor lint fix 2023-02-03 05:31:50 +00:00
Kevin Kim
441282f383 zbc initial done; passes lint. 
clmul logic changes have not verified yet
 2023-02-03 04:48:23 +00:00
Kevin Kim
34eb33a5e7 added bit reverse module, passes lint 2023-02-02 23:10:57 +00:00
Kevin Kim
1b6aca189d started zbc 2023-02-02 20:11:11 +00:00
Kevin Kim
d498d2b2ff zbs passes lint 2023-02-02 20:04:38 +00:00
James Stine
bfa69ea2b3 Forgot 1p ram for rv32gc : cache data 64x128 and cache tags 64x22 2023-02-02 13:54:25 -06:00
Kevin Kim
c1ec17a7a6 clmul finished initial hdl; passes lint 2023-02-02 19:49:14 +00:00
James Stine
b66177fd87 Modify generic/mem for rv32gc ram2 2023-02-02 13:28:18 -06:00
Kevin Kim
655f5bbc5e continued clmul unit 2023-02-02 18:54:33 +00:00
Kevin Kim
bdd12bfec6 started clmul 2023-02-02 16:40:58 +00:00
Ross Thompson
230888db8b Fixed bug #47 discovered by Lee Moore. 
ECALL and EBREAK do not commit their results.
 2023-02-02 08:52:06 -06:00
Ross Thompson
d62a72a76f Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-02-02 08:48:19 -06:00
Kip Macsai-Goren
0a6787026b Merge remote-tracking branch 'upstream/main' into main 2023-02-01 21:31:57 -08:00
Kip Macsai-Goren
26e8b85111 added beginning of a ZBS instruction module to the ALU. Control signals still needed 2023-02-01 21:31:25 -08:00
James Stine
6ce80b6b8a Update ram2 and other memories and associated wrappers 2023-02-01 17:03:48 -06:00
Ross Thompson
0035579553 Minor branch predictor bug fix. 2023-02-01 10:59:38 -06:00
Ross Thompson
2a5b6408f2 Removed unused signal. 2023-02-01 10:27:58 -06:00
David Harris
0280942563 Fixed merge conflict to get synthesis working again 2023-02-01 04:43:57 -08:00
Ross Thompson
c3e3afe398 Minor change to btb. 2023-02-01 00:24:54 -06:00
Madeleine Masser-Frye
ad6d7eb5e2 added memories (not tested) 2023-02-01 06:08:27 +00:00
Ross Thompson
8a6eaa23cc Minor optimization to btb. 2023-01-31 22:03:51 -06:00
David Harris
c666015c56 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-01-31 14:40:19 -08:00
Ross Thompson
81b280576f Updates to RAS. 2023-01-31 15:17:32 -06:00
Ross Thompson
fc2e3fed91 Simplified RAS. 2023-01-31 14:54:05 -06:00
Ross Thompson
a89f9dc92c RAS file name was spelled wrong. 2023-01-31 14:35:05 -06:00
Ross Thompson
92fc532b82 Created scripts to install imperas and run a single test using imperas. 2023-01-31 13:51:05 -06:00
Ross Thompson
c9c4f63c18 Fixed remaining bugs in the imperas merge. 2023-01-31 13:04:26 -06:00
Ross Thompson
026071e247 Merge branch 'imperas' 2023-01-31 12:46:22 -06:00
Ross Thompson
5a770f148c Minor bug fix in gshare. 2023-01-31 10:45:32 -06:00
Ross Thompson
ad0a0f0d51 Renamed signals in RAS. 2023-01-31 10:44:11 -06:00
Ross Thompson
0e3c77bed3 Found small bug in gshare. 2023-01-31 00:17:49 -06:00
Ross Thompson
939095615f Fixed parameterization in testbench. 2023-01-31 00:11:01 -06:00
Ross Thompson
8feac6d242 Parameterized testbench branch predictor preload. 2023-01-31 00:08:11 -06:00
Ross Thompson
238c4d14a9 More branch predictor cleanup. 2023-01-30 23:55:52 -06:00
Ross Thompson
80f50f10d3 Improved signal names. 2023-01-30 23:51:04 -06:00
Ross Thompson
a15889e0aa Major cleanup of branch predictor. 2023-01-30 23:37:34 -06:00
Ross Thompson
42828e6ec4 Simplified gshare. 2023-01-30 19:27:18 -06:00
Ross Thompson
4cbefd9834 Minor gshare optimization. 2023-01-30 18:13:12 -06:00
David Harris
1121ff0fa7 Restored top-level modules without import statements 2023-01-30 12:54:40 -08:00
David Harris
4a4be04530 Moved out version of wally using package because synthesis isn't working yet 2023-01-30 12:48:52 -08:00
David Harris
a2f66313ea Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-01-30 11:00:51 -08:00