Alec Vercruysse
bfb4f0d6eb
add check for legal funct3 for IW instructions
2023-03-28 15:59:48 -07:00
Ross Thompson
73e6972f0b
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-03-28 16:31:50 -05:00
Ross Thompson
69f6b291c6
Possible fix for issue 148.
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I found the problem. We use a Committed(F/M) signal to indicate the IFU or LSU has an ongoing cache or bus transaction and should not be interrupted. At the time of the mret, the IFU is fetching uncacheable invalid instructions asserting CommittedF. As the IFU finishes the request it unstalls the pipeline but continues to assert CommittedF. (This is not necessary for the IFU). In the same cycle the LSU d cache misses. Because CommittedF is blocking the interrupt the d cache submits a cache line fetch to the EBU.
I am thinking out loud here. At it's core the Committed(F/M) ensure memory operations are atomic and caches don't get into inconsistent states. Once the memory operation is completed the LSU/IFU removes the stall but continues to hold Committed(F/M) because the memory operation has completed and it would be wrong to allow an interrupt to occur with a completed load/store. However this is not true of the IFU. If we lower CommittedF once the operation is complete then this problem is solved. The interrupt won't be masked and the LSU will flush the d cache miss.
This requires a minor change in the cachebusfsm and cachefsm. I will report back after I've confirmed this works.
2023-03-28 14:47:08 -05:00
Ross Thompson
d55b0c8c1f
Merge pull request #169 from davidharrishmc/dev
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PMP Fix to issue 132
2023-03-28 11:49:00 -05:00
David Harris
aa31b45d88
Fixed RV32 tests after PMP fix
2023-03-28 08:35:23 -07:00
David Harris
39d3bf8e8a
Fixed PMP issue 132. Updated tests to initialize PMP before using. Needs to remake tests
2023-03-28 06:58:17 -07:00
David Harris
20ebf7e536
CSRS privileged coverage test
2023-03-28 04:37:56 -07:00
Ross Thompson
8504774a11
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-03-27 11:55:19 -05:00
David Harris
edaa306240
Removed unnecessary monitor
2023-03-27 09:52:38 -07:00
Ross Thompson
88c572d9bb
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-03-27 10:22:48 -05:00
Lee Moore
39ac6be103
Merge branch 'openhwgroup:main' into add-linux
2023-03-27 09:44:13 +01:00
Ross Thompson
3fc0c4b34e
Modified plic and uart to remove async reset. This removes vivado critical warning.
2023-03-24 20:37:48 -05:00
Ross Thompson
78ab9f59af
Updated GPIO signal names to reflect book.
2023-03-24 18:55:43 -05:00
Ross Thompson
1f37e6dcea
Renamed controllerinputstage to controllerinput to match book.
2023-03-24 17:57:02 -05:00
David Harris
0dc6f9b991
Merged ross's spacing fixes
2023-03-24 15:47:26 -07:00
David Harris
46e0841011
Merge pull request #159 from ross144/main
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Renamed signal to match book
2023-03-24 15:34:59 -07:00
Ross Thompson
730f3ac84e
Fixed all tap/space issue in RTL.
2023-03-24 17:32:25 -05:00
Ross Thompson
0511c73e22
Replaced tabs -> spaces cache.
2023-03-24 15:15:38 -05:00
Ross Thompson
1ff15c3882
Updated EBU to replace tabs with spaces.
2023-03-24 15:01:38 -05:00
Kevin Kim
eb8fe3ed17
Zero/Sign extend mux in Shifter, Zero extend mux in Bitmanip alu
2023-03-24 11:52:51 -07:00
David Harris
a5e569245b
Shifter capitalization
2023-03-24 09:01:07 -07:00
Ross Thompson
2956c11dbc
Renamed ebu signal.
2023-03-24 10:51:04 -05:00
David Harris
9f1c1958a6
Query about CondExtA
2023-03-24 08:35:33 -07:00
David Harris
34e0b3bc61
Shifter sign simplification and capitalization
2023-03-24 08:27:30 -07:00
David Harris
25a1ea7d23
FPU detect illegal instructions
2023-03-24 08:12:32 -07:00
David Harris
59f948d47c
Start of EBU coverage tests
2023-03-24 08:12:02 -07:00
David Harris
d04f4cedf6
ALUControl Elimination
2023-03-24 08:10:48 -07:00
David Harris
ac0b669518
Merged ALUOp into ALUControl to simplify ALU mux
2023-03-24 07:28:42 -07:00
David Harris
9ffac8315b
Simplified rotate source to shifter
2023-03-24 06:49:26 -07:00
David Harris
c6561fffd4
BMU simplifications
2023-03-24 06:18:06 -07:00
David Harris
e67b077a3e
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-03-24 05:59:48 -07:00
Kevin Kim
3ec4b23ff5
minor formatting
2023-03-23 22:28:21 -07:00
Kevin Kim
f07397df76
comments
2023-03-23 22:22:25 -07:00
Kevin Kim
125cb0ce44
removed redundant signals
...
-fixed some comments too
2023-03-23 22:20:37 -07:00
Kevin Kim
969b2723ef
bitmanip alu submodule passes lint and regression
2023-03-23 21:56:03 -07:00
Kevin Kim
e2a5c87b73
more progress. Failing regression
2023-03-23 20:42:49 -07:00
Kevin Kim
1eb04d9747
Merge branch 'openhwgroup:main' into bitmanip-alu
2023-03-23 19:53:50 -07:00
David Harris
dc156cc09c
Removed unnecessary XZero from fdivsqrt
2023-03-23 17:25:59 -07:00
David Harris
7e947023c1
Merged BMU
2023-03-23 17:24:40 -07:00
Kevin Kim
f9fc30e1cb
fixed rori rv32 bug
2023-03-23 16:06:46 -07:00
Kevin Kim
7b1567829c
more progress on bitmanip alu modularization
2023-03-23 16:02:38 -07:00
David Harris
f8ad1b3db8
Improved IEU and bitmanip test coverage
2023-03-23 14:24:41 -07:00
Kevin Kim
e5be0bd2fd
started bitmanip alu modularization
2023-03-23 14:02:28 -07:00
David Harris
99c471ccfe
Added csrwrites.S test case for privileged tests
2023-03-23 10:55:32 -07:00
Kevin Kim
bfaf646ed2
Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip
2023-03-22 10:34:19 -07:00
Kevin Kim
cd50018087
remove outdated
2023-03-22 10:34:17 -07:00
Kevin Kim
605f41cd55
Merge branch 'openhwgroup:main' into bit-manip
2023-03-22 10:33:15 -07:00
Kevin Kim
b3fbdba7f3
updated header comments to indicate chapter 15
2023-03-22 10:31:21 -07:00
Kevin Kim
c197a040c8
remove helper python script
2023-03-22 10:27:59 -07:00
Kevin Kim
b9b8023674
formatting
2023-03-22 10:26:04 -07:00
