Kip Macsai-Goren
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b943470049
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Modified arch64 tests to remove floating point and double tests from hanging make
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2023-02-17 09:51:55 -08:00 |
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Kevin Kim
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405bbcc6a4
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added critical rsync command to python script and builds I-ext tests
-rsync copies the stuff from riscof_work to work/riscv-arch-test
-
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2023-02-14 10:40:29 -08:00 |
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Kevin Kim
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6d4f1dd928
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updated python script to generate bash file
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2023-02-11 11:08:11 -08:00 |
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Kevin Kim
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8d28839d72
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changed python file to use WALLY env variable
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2023-02-11 00:30:56 +00:00 |
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Kip Macsai-Goren
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f9d934e5ae
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Added necessary files to make bit make and run bit manipulation tests as part of regression
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2023-02-10 10:35:19 -08:00 |
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David Harris
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8ad5f2b181
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Added RVTEST_CASE to testgen header
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2023-02-09 18:25:24 -08:00 |
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David Harris
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51a792431f
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Moved test generators
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2023-02-09 18:24:48 -08:00 |
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David Harris
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f2c7a489b2
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Test gen header
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2023-02-09 18:14:26 -08:00 |
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David Harris
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93637fd9cb
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debug simulating, produing discrepancy
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2023-02-06 16:47:56 -08:00 |
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David Harris
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bb39570576
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Fixed floating point crash in debug.S
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2023-02-06 15:38:57 -08:00 |
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David Harris
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aba8b9a64b
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More progress on debug.S, but it crashes in Spike
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2023-02-04 09:59:22 -08:00 |
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David Harris
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1bb5599806
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Developing debug test
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2023-02-04 08:31:47 -08:00 |
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David Harris
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0f7ea52f9b
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Started making debug testcase
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2023-02-04 08:18:55 -08:00 |
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David Harris
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8078cafa27
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Renamed regression to sim
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2023-02-02 14:48:23 -08:00 |
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David Harris
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99d179dd3e
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Removed pipelined level of hierarchy
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2023-02-02 14:14:11 -08:00 |
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David Harris
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8b34f5ac98
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Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
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2023-01-28 18:18:53 -08:00 |
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Kip Macsai-Goren
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95b26c49b9
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Fixed regression test dependance on bp status by adding handling of UART tx empty interrupts.
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2023-01-28 17:29:35 -08:00 |
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David Harris
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99f967b6f6
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Modified testgen to not produce reference outputs
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2023-01-27 07:25:40 -08:00 |
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David Harris
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71d1c8fc68
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Removed unused WALLY test references
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2023-01-27 07:25:04 -08:00 |
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David Harris
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ae7d23380a
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Removed unused reference files
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2023-01-27 07:21:55 -08:00 |
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David Harris
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7839fe2402
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Removed f tests from rv32e
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2023-01-27 06:15:20 -08:00 |
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David Harris
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b2c8c37077
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Update riscof makefile to use rv32gc config
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2023-01-27 05:57:58 -08:00 |
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David Harris
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8362e7466f
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Renamed spike_rv32imc_isa.yaml to rv32gc to reflect cases tested
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2023-01-27 05:56:49 -08:00 |
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David Harris
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58a973ec97
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Refactored setup QUESTA and SNPS paths, and removed troublesome bit manipulation test cases
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2023-01-23 05:00:11 -08:00 |
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David Harris
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3d13683c07
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Continued framework for B instructions
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2023-01-20 14:27:13 -08:00 |
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Ross Thompson
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6cbce9672d
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Possibly working speculative global history.
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2023-01-08 23:46:53 -06:00 |
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Ross Thompson
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0eda4b1ab3
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core part of global history works now. forwarding is still broken.
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2023-01-08 23:35:02 -06:00 |
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Ross Thompson
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0eceeeeeaa
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Simiplified global history branch predictor.
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2023-01-04 23:41:55 -06:00 |
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Kip Macsai-Goren
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ffae1c5ee6
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added fs=00 to status fp enabled test
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2022-12-22 15:15:53 -08:00 |
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Kip Macsai-Goren
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a768d70093
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Added status.tvm bit test that passes make and regression
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2022-12-22 14:43:22 -08:00 |
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Kip Macsai-Goren
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7aadf50f26
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updated trap handler alignemnts to 64 bytes in priv tests
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2022-12-22 14:23:04 -08:00 |
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David Harris
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c7f3aae084
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Only delegated bits of SIP are readable
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2022-12-21 12:32:49 -08:00 |
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Ross Thompson
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c3b43b2fac
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Waiting on fix for wally64periph uart test.
would like to remove vectored interrupt adder.
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2022-12-21 13:16:09 -06:00 |
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Ross Thompson
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0b4186f1e8
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Vectored interrupts now require 64 byte alignment.
Eliminates adder.
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2022-12-21 12:05:49 -06:00 |
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David Harris
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03c700d91c
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Restored rv32d arch test after new push
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2022-12-20 10:56:33 -08:00 |
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Ross Thompson
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4f56e6ff5d
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I think I finally fixed a long hidden bug in the replacement policy. The figures in the textbook are correct. There was small bug in the rtl.
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2022-12-18 18:30:35 -06:00 |
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Ross Thompson
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b4229c01ca
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Have a basic cache test to fill all ways and sets.
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2022-12-18 17:20:30 -06:00 |
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Ross Thompson
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376b01fcb8
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Attempted to make a cache test.
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2022-12-18 17:15:08 -06:00 |
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Ross Thompson
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ebdac1a9d0
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Updated tests for fpga and BP.
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2022-12-18 16:24:26 -06:00 |
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David Harris
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5f637ef4a7
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Use FPU divider for integer division when F is supported
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2022-12-14 17:03:13 -08:00 |
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Kip Macsai-Goren
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2dfa426e10
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added passing GPIO test to 64 bit tests
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2022-12-05 21:31:00 -08:00 |
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Kip Macsai-Goren
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1d268fded4
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added corrrect scr read out of uart to periph test
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2022-12-05 20:16:02 -08:00 |
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Kip Macsai-Goren
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7411d50a78
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added all 32 bit tests to 64 bit periph tests except gpio
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2022-12-05 20:16:02 -08:00 |
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Kip Macsai-Goren
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badc684f07
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added copies of 64 bit tests to 32 bit periph and priv tests
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2022-12-05 20:16:02 -08:00 |
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Kip Macsai-Goren
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282d06b45f
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added -01 to all WALLY tests
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2022-12-05 20:16:02 -08:00 |
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Ross Thompson
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128b3d20e7
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Updated riscv arch test removed misaligned1.
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2022-12-04 00:18:10 +00:00 |
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Kip Macsai-Goren
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af00eadec2
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added tests for invalid address being written to satp. Not passing regression
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2022-11-27 13:22:35 -08:00 |
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Kip Macsai-Goren
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6fdd603ba1
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added potential fix to overrun error and fifo interrupt error. test passes
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2022-11-06 22:01:02 -08:00 |
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Kip Macsai-Goren
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b42fc7ec6d
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fixed fifo timout handling. error now in data ready interrupt
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2022-11-05 13:34:24 -07:00 |
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Kip Macsai-Goren
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23268d22e5
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fixed broken instructions so make works.
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2022-11-03 23:06:20 +00:00 |
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