Ross Thompson
bcadbd7104
Formatting.
2023-01-20 13:09:42 -06:00
Ross Thompson
ecceea177a
Formatting.
2023-01-20 13:05:10 -06:00
Ross Thompson
3d202ed2fd
Reformatting cachefsm.
2023-01-20 12:49:55 -06:00
Ross Thompson
d3df8e062e
Formatting.
2023-01-20 12:41:57 -06:00
Ross Thompson
1ecf4e4cc9
Merge branch 'main' of github.com:davidharrishmc/riscv-wally
2023-01-20 12:37:12 -06:00
Ross Thompson
74ab386735
More cleanup and formatting.
2023-01-20 12:34:40 -06:00
David Harris
26cb45e240
renamed comparator module
2023-01-20 10:13:47 -08:00
David Harris
64080ac098
Updated HMC Synopysys license manager
2023-01-20 10:13:20 -08:00
Ross Thompson
340e1797ea
More cleanup and formatting.
2023-01-20 12:09:21 -06:00
Ross Thompson
c5169a3e39
Formatting.
2023-01-20 11:51:10 -06:00
Ross Thompson
5b5a615e4a
Integrated the missing zifence tests into the regression test.
2023-01-20 10:34:49 -06:00
Ross Thompson
29f45d6203
Imperas found a bug with the Fence.I instruction.
...
If a fence.i directly followed a store miss, the d$ would release Stall during the cache line write.
Then transition to ReadHold. This cause the d$ flush to go high while in ReadHold. The solution is
to ensure the cache continues to assert Stall while in WriteLine state.
There was a second issue also. The D$ flush asserted FlushD which flushed the I$ invalidate.
Finally the third issue was CacheEn from the FSM needs to be asserted on an InvalidateCache.
2023-01-20 10:17:21 -06:00
Ross Thompson
2cca457f14
Imperas found a bug with the Fence.I instruction.
...
If a fence.i directly followed a store miss, the d$ would release Stall during the cache line write.
Then transition to ReadHold. This cause the d$ flush to go high while in ReadHold. The solution is
to ensure the cache continues to assert Stall while in WriteLine state.
There was a second issue also. The D$ flush asserted FlushD which flushed the I$ invalidate.
Finally the third issue was CacheEn from the FSM needs to be asserted on an InvalidateCache.
2023-01-20 09:41:18 -06:00
Ross Thompson
ce7d92f2dc
Merge branch 'imperas' of github.com:davidharrishmc/riscv-wally into imperas
2023-01-20 08:38:08 -06:00
Lee Moore
5de1801100
Merge pull request #13 from eroom1966/imperas
...
Merge pull request #5 from davidharrishmc/imperas
2023-01-20 14:34:38 +00:00
Lee Moore
bc0497687c
Merge pull request #5 from davidharrishmc/imperas
...
Merge pull request #12 from eroom1966/imperas
2023-01-20 14:33:21 +00:00
Lee Moore
97619eee87
Merge pull request #12 from eroom1966/imperas
...
Imperas
2023-01-20 14:32:57 +00:00
Lee Moore
9dd771933b
Merge pull request #4 from davidharrishmc/imperas
...
Merge pull request #11 from eroom1966/imperas
2023-01-20 14:32:21 +00:00
eroom1966
9fe515c78e
Merge branch 'imperas' of https://github.com/eroom1966/riscv-wally into imperas
2023-01-20 14:31:17 +00:00
Ross Thompson
da4eec7e0e
Improved comment.
2023-01-19 17:41:57 -06:00
Ross Thompson
117ff8163b
ram uses always rather than always_ff due to modelsim issue.
2023-01-19 17:41:15 -06:00
Ross Thompson
23ab178192
Merge branch 'main' of github.com:davidharrishmc/riscv-wally
2023-01-19 17:28:53 -06:00
Ross Thompson
928e06d4fa
Added comment about needed changes in BTB.
2023-01-19 17:28:00 -06:00
Ross Thompson
50fdb7cae9
Rough draft of Install guide.
2023-01-19 17:27:45 -06:00
David Harris
569a016efa
Removed study versions from comparator
2023-01-19 15:13:35 -08:00
David Harris
0488723db9
Moved unused study files to studies directory
2023-01-19 15:13:11 -08:00
David Harris
9df5fdbd89
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
2023-01-19 14:47:54 -08:00
David Harris
25b607566c
RAM declaration cleanup:
2023-01-19 14:47:51 -08:00
Ross Thompson
b027921902
Formatting.
2023-01-19 15:06:37 -06:00
Ross Thompson
ea96c2375f
Formatting.
2023-01-19 14:18:46 -06:00
Ross Thompson
e380fd71ff
Formatting and name changes.
2023-01-19 14:16:29 -06:00
Lee Moore
74610d0aa8
Merge pull request #11 from eroom1966/imperas
...
Imperas
2023-01-19 14:56:44 +00:00
Lee Moore
81d6517732
Merge branch 'davidharrishmc:imperas' into imperas
2023-01-19 14:56:18 +00:00
eroom1966
d9d5b99218
update
2023-01-19 13:29:46 +00:00
eroom1966
a34a1e6238
correct the HASH
2023-01-19 10:41:11 +00:00
Lee Moore
165975d853
Merge pull request #10 from eroom1966/imperas
...
Imperas
2023-01-19 10:28:27 +00:00
Lee Moore
ec84ce98ab
Merge pull request #3 from davidharrishmc/imperas
...
Imperas
2023-01-19 10:27:52 +00:00
eroom1966
b53cb9eb20
customer commands
2023-01-19 10:20:55 +00:00
Ross Thompson
47fdff6488
Formatting.
2023-01-18 19:26:20 -06:00
Ross Thompson
49daa736b1
Formatting spillsupport.
2023-01-18 19:25:54 -06:00
Ross Thompson
cd2f7c6208
Formatting.
2023-01-18 19:11:30 -06:00
Ross Thompson
7289fa8d44
Reduced complexity of spill logic by ensuring the irom outputs offset instrutions on a spill.
2023-01-18 19:10:34 -06:00
Ross Thompson
026d09b79b
More IROM cleanup.
2023-01-18 18:47:02 -06:00
Ross Thompson
19e4d0f7cd
Cleanup dtim and irom.
2023-01-18 18:44:30 -06:00
Ross Thompson
997dda11a8
Added comments to decompress.sv. May want to consider additional documentation.
2023-01-18 18:26:51 -06:00
Ross Thompson
fb234d506d
Formatted subword* and bytemask.
2023-01-18 18:20:22 -06:00
Ross Thompson
469efa61af
Formatting.
2023-01-18 18:17:48 -06:00
Ross Thompson
cbf46f417a
Formatting.
2023-01-18 18:16:56 -06:00
Ross Thompson
22eee73a45
Formatting.
2023-01-18 18:16:20 -06:00
Ross Thompson
2048edb7a0
Renamed signals in amoalu.
2023-01-18 18:13:18 -06:00
