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85b5d92f3f
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107 Commits

Author SHA1 Message Date
James E. Stine
85b5d92f3f Update Makefile for SoftFloat-3e 2022-02-26 14:10:27 -06:00
James E. Stine
e295785b45 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-26 13:20:59 -06:00
James E. Stine
896fc0be0e Update sample SoftFloat programs 2022-02-26 13:20:50 -06:00
David Harris
ff674b695c Moved Softfloat / TestFloat 2022-02-26 19:17:32 +00:00
James E. Stine
860eca356e Delete unused FP vector scripts 2022-02-26 13:02:57 -06:00
Kip Macsai-Goren
2da39c7052 allowed for vectored and unvectored interrupts in trap handlers 2022-02-25 23:57:45 +00:00
Kip Macsai-Goren
ac03a95aeb added support for trap handlers in in multiple pivilege modes 2022-02-25 23:57:45 +00:00
bbracker
ac114e1c6d Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-22 04:27:50 +00:00
bbracker
202bd2f8f8 change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
Kip Macsai-Goren
adb9134c64 removed macro-only file. no longer used 2022-02-21 07:15:00 +00:00
Kip Macsai-Goren
4a17b2e4ed made sure program isn't passing the testwith a false posistive 2022-02-21 07:14:42 +00:00
Kip Macsai-Goren
04892c5d38 added scratch register tests for 64 and 32 bits 2022-02-21 07:03:12 +00:00
Kip Macsai-Goren
dcb5d0f6a9 Added misa test for both 32 and 64 bits 2022-02-18 19:41:50 +00:00
Kip Macsai-Goren
6a76f40e26 light cleanup 2022-02-15 20:19:14 +00:00
Kip Macsai-Goren
05e944628d added high bit registers to CSR permission tests 2022-02-15 20:19:14 +00:00
Kip Macsai-Goren
e16581d73d added CSR permission and minfor to 32 bit tests 2022-02-15 20:19:14 +00:00
Kip Macsai-Goren
943c4d9d7c merged test macros in with 32 bit tests 2022-02-15 20:19:14 +00:00
Kip Macsai-Goren
9ff4025844 light cleanup for privileged tests 2022-02-15 17:06:16 +00:00
Kip Macsai-Goren
985c20c961 updated tests to use the combined library 2022-02-15 17:06:16 +00:00
Kip Macsai-Goren
91915a808c Began to merge test-lib and test-macros into one file 2022-02-15 17:06:16 +00:00
Kip Macsai-Goren
d47a731bda updated verify to only use comments with "#" 2022-02-15 17:06:16 +00:00
Ross Thompson
038897f448 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-08 14:47:15 -06:00
David Harris
64e9f4c0d3 Restored E tests to makefrag 2022-02-08 16:41:11 +00:00
bbracker
23b743206a refactor buildroot-config-src into linux folder 2022-02-08 00:26:06 +00:00
bbracker
77e78363cc trim away unneeded linker and header files intended for non-spike machines from wally-riscv-arch-test 2022-02-07 23:59:47 +00:00
David Harris
50b44b4416 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-02-07 14:43:31 +00:00
Kip Macsai-Goren
ddc8883ea5 fixed verify step to work correctly with comments. clarified copy references without simulating 2022-02-06 19:48:23 +00:00
Kip Macsai-Goren
0eb280b314 added new tests to make and testbench 2022-02-06 19:47:22 +00:00
Kip Macsai-Goren
5d1a0f3402 clarified csr write test 2022-02-06 19:46:29 +00:00
Kip Macsai-Goren
5ddcb29129 added CSR permission tests 2022-02-06 19:45:58 +00:00
Kip Macsai-Goren
51355abc2d light cleanup 2022-02-06 02:05:59 +00:00
Kip Macsai-Goren
07c806b02e added comments to existing MMU tests 2022-02-06 02:05:59 +00:00
Kip Macsai-Goren
e0ed4c00fc added commenting in reference outputs that aren't simulated in spike 2022-02-06 02:05:59 +00:00
Kip Macsai-Goren
1a5111fb75 Allowed commenting in signature files 2022-02-06 02:05:59 +00:00
David Harris
9b55848ffc Added E tests to wally-riscv-arch-test rv32i_m/I and fixed cyclic path in rv32e configuration 2022-02-06 01:22:40 +00:00
bbracker
71a0d96c8d Remove rv32e tests from rv32i_m Makefrag so that make XLEN=32 works 2022-02-05 21:34:50 +00:00
David Harris
2c67f32b97 RV32e tests 2022-02-04 14:30:36 +00:00
David Harris
c2ddb121a0 Added E tests to repo 2022-02-03 23:42:31 +00:00
David Harris
17277775e6 E tests 2022-02-03 22:55:55 +00:00
David Harris
4ba37d5cc0 Config file & wally-riscv-arch-test cleanup 2022-02-02 16:35:52 +00:00
Ross Thompson
85d510e315 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-02-01 10:50:38 -06:00
Ross Thompson
73edd50120 Updated fpga's bootloader to reflect the changes to the gpio address change. 2022-02-01 10:43:24 -06:00
Kip Macsai-Goren
4b94cf9a43 Renamed test library 2022-01-31 20:11:21 +00:00
Kip Macsai-Goren
4d951923f4 updated minfo test to account for no mconfigptr 2022-01-31 20:11:21 +00:00
Kip Macsai-Goren
14933a7231 fixed CSR read-only test to have correct output 2022-01-31 20:11:21 +00:00
Kip Macsai-Goren
242b27705d added machine info test that uses new test library 2022-01-31 05:54:43 +00:00
Kip Macsai-Goren
3c61d6eec2 tentatively remade test lib to use macros for more flexibility 2022-01-31 05:54:43 +00:00
Kip Macsai-Goren
ee982c7588 converted library to header file for RISCV test compliance 2022-01-31 05:54:43 +00:00
Kip Macsai-Goren
9e3b25c940 updated tests to use test title instead of number encoding 2022-01-31 05:54:42 +00:00
David Harris
448acedd8b Set up rv32emc config 2022-01-27 14:37:58 +00:00