Square root negative exponent handling

This commit is contained in:
cturek 2022-07-22 16:45:19 +00:00
parent 12c92a05ff
commit 338f44dfc8
5 changed files with 41 additions and 23 deletions

Binary file not shown.

View File

@ -1,6 +1,6 @@
/* sqrttestgen.c */ /* sqrttestgen.c */
/* Written 19 October 2021 David_Harris@hmc.edu /* Written 7/22/2022 by Cedar Turek
This program creates test vectors for mantissa component This program creates test vectors for mantissa component
of an IEEE floating point square root. of an IEEE floating point square root.
@ -15,6 +15,7 @@
/* Constants */ /* Constants */
#define ENTRIES 17 #define ENTRIES 17
#define BIGENT 1000
#define RANDOM_VECS 500 #define RANDOM_VECS 500
/* Prototypes */ /* Prototypes */
@ -34,6 +35,9 @@ void main(void)
1.75, 1.875, 1.99999, 1.75, 1.875, 1.99999,
1.1, 1.5, 1.01, 1.001, 1.0001, 1.1, 1.5, 1.01, 1.001, 1.0001,
2/1.1, 2/1.5, 2/1.25, 2/1.125}; 2/1.1, 2/1.5, 2/1.25, 2/1.125};
double bigtest[BIGENT];
double exps[ENTRIES] = {0, 0, 2, 3, 4, 5, 6, 7, 8, 1, 10, double exps[ENTRIES] = {0, 0, 2, 3, 4, 5, 6, 7, 8, 1, 10,
11, 12, 13, 14, 15, 16}; 11, 12, 13, 14, 15, 16};
int i; int i;
@ -44,13 +48,14 @@ void main(void)
exit(1); exit(1);
} }
for (i=0; i<ENTRIES; i++) { // Small Test
aFrac = mans[i]; // for (i=0; i<ENTRIES; i++) {
aExp = exps[i] + bias; // aFrac = mans[i];
rFrac = sqrt(aFrac * pow(2, exps[i])); // aExp = exps[i] + bias;
rExp = (int) (log(rFrac)/log(2) + bias); // rFrac = sqrt(aFrac * pow(2, exps[i]));
output(fptr, aExp, aFrac, rExp, rFrac); // rExp = (int) (log(rFrac)/log(2) + bias);
} // output(fptr, aExp, aFrac, rExp, rFrac);
// }
// WS // WS
// Test 1: sqrt(1) = 1 0000 0000 0000 00 // Test 1: sqrt(1) = 1 0000 0000 0000 00
@ -67,6 +72,16 @@ void main(void)
// output(fptr, a, r); // output(fptr, a, r);
// } // }
// Big Test
for (i=0; i<BIGENT; i++) {
bigtest[i] = random_input();
aFrac = bigtest[i];
aExp = (i - BIGENT/2) + bias;
rFrac = sqrt(aFrac * pow(2, (i - BIGENT/2)));
rExp = (int) (log(rFrac)/log(2) + bias);
output(fptr, aExp, aFrac, rExp, rFrac);
}
fclose(fptr); fclose(fptr);
} }
@ -105,6 +120,6 @@ void printhex(FILE *fptr, double m)
double random_input(void) double random_input(void)
{ {
return 1.0 + rand()/32767.0; return 1.0 + ((rand() % 32768)/32767.0);
} }

View File

@ -3,4 +3,5 @@ add wave -noupdate /testbench/srt/*
add wave -noupdate /testbench/srt/sotfc2/* add wave -noupdate /testbench/srt/sotfc2/*
add wave -noupdate /testbench/srt/preproc/* add wave -noupdate /testbench/srt/preproc/*
add wave -noupdate /testbench/srt/postproc/* add wave -noupdate /testbench/srt/postproc/*
add wave -noupdate /testbench/srt/expcalc/*
add wave -noupdate /testbench/srt/divcounter/* add wave -noupdate /testbench/srt/divcounter/*

View File

@ -389,11 +389,11 @@ module expcalc(
input logic Sqrt, input logic Sqrt,
output logic [`NE-1:0] calcExp output logic [`NE-1:0] calcExp
); );
logic [`NE-1:0] SExp, DExp, SXExp; logic [`NE+1:0] SExp, DExp, SXExp;
assign SXExp = XExp - (`NE)'(`BIAS); assign SXExp = {2'b00, XExp} - (`NE+2)'(`BIAS);
assign SExp = {1'b0, SXExp[`NE-1:1]} + (`NE)'(`BIAS); assign SExp = (SXExp >> 1) + (`NE+2)'(`BIAS);
assign DExp = XExp - YExp + (`NE)'(`BIAS); assign DExp = {2'b00, XExp} - {2'b00, YExp} + (`NE+2)'(`BIAS);
assign calcExp = Sqrt ? SExp : DExp; assign calcExp = Sqrt ? SExp[`NE-1:0] : DExp[`NE-1:0];
endmodule endmodule
@ -462,11 +462,13 @@ module srtpostproc(
end end
assign floatRes = S[`DIVLEN] ? S[`DIVLEN:1] : S[`DIVLEN-1:0]; assign floatRes = S[`DIVLEN] ? S[`DIVLEN:1] : S[`DIVLEN-1:0];
assign intRes = intS[`DIVLEN] ? intS[`DIVLEN:1] : intS[`DIVLEN-1:0]; assign intRes = intS[`DIVLEN] ? intS[`DIVLEN:1] : intS[`DIVLEN-1:0];
assign shiftRem = (intRem >>> (`DIVLEN - dur + 2)); assign shiftRem = (intRem >> (zeroCntD));
always_comb always_comb begin
if (Int) Result = intRes >> (`DIVLEN - dur); if (Int) begin
else if (Mod) Result = shiftRem[`DIVLEN-1:0]; if (Mod) Result = shiftRem[`DIVLEN-1:0];
else Result = floatRes; else Result = intRes >> (`DIVLEN - dur);
end else Result = floatRes;
end
assign calcSign = XSign ^ YSign; assign calcSign = XSign ^ YSign;
endmodule endmodule

View File

@ -53,7 +53,7 @@ module testbench;
// Test parameters // Test parameters
parameter MEM_SIZE = 40000; parameter MEM_SIZE = 40000;
parameter MEM_WIDTH = 64+64+64+64; parameter MEM_WIDTH = 64+64+64;
// Test sizes // Test sizes
`define memr 63:0 `define memr 63:0
@ -70,9 +70,9 @@ module testbench;
integer testnum, errors; integer testnum, errors;
// Equip Int, Sqrt, or IntMod test // Equip Int, Sqrt, or IntMod test
assign Int = 1'b1; assign Int = 1'b0;
assign Mod = 1'b0; assign Mod = 1'b0;
assign Sqrt = 1'b0; assign Sqrt = 1'b1;
// Divider // Divider
srt srt(.clk, .Start(req), srt srt(.clk, .Start(req),
@ -101,7 +101,7 @@ module testbench;
begin begin
testnum = 0; testnum = 0;
errors = 0; errors = 0;
$readmemh ("inttestvectors", Tests); $readmemh ("sqrttestvectors", Tests);
Vec = Tests[testnum]; Vec = Tests[testnum];
a = Vec[`mema]; a = Vec[`mema];
{asign, aExp, afrac} = a; {asign, aExp, afrac} = a;