From 338f44dfc8a35dbaa5ca3e1659916ed9bef24520 Mon Sep 17 00:00:00 2001 From: cturek Date: Fri, 22 Jul 2022 16:45:19 +0000 Subject: [PATCH] Square root negative exponent handling --- pipelined/srt/sqrttestgen | Bin 22792 -> 22792 bytes pipelined/srt/sqrttestgen.c | 33 ++++++++++++++++++++++++--------- pipelined/srt/srt-waves.do | 1 + pipelined/srt/srt.sv | 22 ++++++++++++---------- pipelined/srt/testbench.sv | 8 ++++---- 5 files changed, 41 insertions(+), 23 deletions(-) diff --git a/pipelined/srt/sqrttestgen b/pipelined/srt/sqrttestgen index 45fc6e7868a87d7e5f3b9308e340b3600a392273..7c6efb9f9085d76783d4192e98ba9cd8c44b8d24 100755 GIT binary patch delta 1737 zcmY+FYfKzf6vyw~T^q z&i&tW&OLjR9lk_|FVSGs+36p|kV!+QwHtdatqe_tAad?tOwB zX?aW+a%MJbA=|;UOmB{tD3PfsyPYu`2o@6(7p1g?G;ZBPUeh!=Uqx1sXOY{HBgh@d zVdPHakC6`}UqtRg{xHRXp`++HopQ*1Jo_nxVGi#g1UUo|LL5dA&Tu%6Fvg)DVVpw` z!UTtI1l=$Gp~nMo<*o(Ov;fveVa-+hQ>vjpo5$hj!ck+YC5BioRp$hYwPJaQa4hWsnCfxMXF4MQv7h{y@kPRQh8cp2dr z+4Zc_Kp!lPvq{qoQ+QN{3af~mskHR zG~t4dfn&*<-qGNd8K0uwFk~o7omQh$iJ~dPO{e=8%>W@~;DL7PJa;zcUhCH?+$An{ zOg%H>uM~?0`NfG?#4ft>Jr1du_>>bnxP9``vKz|4Z<)r;gtp-NidJ{tG|dobixZ~V z1-2b5Kb;PB>0o!k?-T?37gz#am}WnS50{O>sVeZ2<_t*!vlG70zz46@8e3s*hEHb= z()N;ih@Oe@WM|mi<{|BZLzl zvZYxkuIak>8|^^dV7gOY*UZ%v+)b>seyg(`_kC<`_XZZD8?~PLM<`VQ^Xww&0PCST zquxA+n{1Lao43+VqpZ5gLuJ<1bQRVm&7S=b_nSIf1~$(by=IFR9Lw0qHml1 EKl{>MKmY&$ delta 1709 zcmZ9NZ){Ul6u|Fo_op4Nd#~F{-T!uO^RXi9oMf94tgdf+=swIq1rr?XOCvEc^@FJ~ zy3TCX)gjDW6XqAF`au?ASZJb)CTk~RC&r8!5~lc}L5OdHVfF(SEIiL`PaE(i@1FBJ z=iGblIrpZWIzy+<(3uNnkCo(x=fhv()~J|=sOZTlQ8q^}*9^&@PMkWl^zuzrR*_F54db&tX5p z0*Ac_3BPzVkq$x0^Y?T;2cR#2&ZC~lM}-r}k0CE3cOYLtZb4o{u0u{CS0QW27096t zG(1z1?|%k4jZCmTeZbG)Hxu|vtE#eGX@ zacd%?T>ZaSD*X~NYODY9&=(a=8-xsgRUAvG5oIl1ElSFo_8oZrqP)y+Bx7X9H@WK@ zA^C)or4w&wCGp5}aCmiE*-#@%ZHV32)KMAck2{iF;3w7guvWo2&;q+aQ08lHTYUfi z06V(W$oKIBe8sIhx<2jO;Ngo8Z1oqL7M%1O_J!cGC!r;Nu~SI}f4{yN&ZeYbvh=Z= zf^GA|210_Du~paoIj=Ux>MTukFYB|oUYNN*e;K5MYD%D*?y-+%emLt>BiFQHutNV5 zd{+VXON%2*g*Naj;B9^Btbd!>JjqKUVzY;>SZeL9l7slv4<6-m_t2JW>ckC`X1^WN zEkDt&@qcuE7J@w)T@Qc^faJ^DZ|iyjB=3I;r0K4%6DaT!yDL7qWf@j=f|Yp7B?*KZ zzN=t^=bIa?Fni%ku~F#}=LqcSgli>FS4!_1`YmO~2BT1JA`M_V4Br7ZCp8;LmYtWH zs!l^f7Z{7d{@5MqmcRm52is^=sT}KTI%+e^&@VpRY_+@JJa5TUTdeW%A88S7?CE4V0#_8>Ob72Bnr5U9e|_jDHfFEgjF$J~qQdf6yY Vq2eg}#Me`i!T%qq_lmFG_#ek*L> 1) + (`NE+2)'(`BIAS); + assign DExp = {2'b00, XExp} - {2'b00, YExp} + (`NE+2)'(`BIAS); + assign calcExp = Sqrt ? SExp[`NE-1:0] : DExp[`NE-1:0]; endmodule @@ -462,11 +462,13 @@ module srtpostproc( end assign floatRes = S[`DIVLEN] ? S[`DIVLEN:1] : S[`DIVLEN-1:0]; assign intRes = intS[`DIVLEN] ? intS[`DIVLEN:1] : intS[`DIVLEN-1:0]; - assign shiftRem = (intRem >>> (`DIVLEN - dur + 2)); - always_comb - if (Int) Result = intRes >> (`DIVLEN - dur); - else if (Mod) Result = shiftRem[`DIVLEN-1:0]; - else Result = floatRes; + assign shiftRem = (intRem >> (zeroCntD)); + always_comb begin + if (Int) begin + if (Mod) Result = shiftRem[`DIVLEN-1:0]; + else Result = intRes >> (`DIVLEN - dur); + end else Result = floatRes; + end assign calcSign = XSign ^ YSign; endmodule diff --git a/pipelined/srt/testbench.sv b/pipelined/srt/testbench.sv index 513305b2..1b40c673 100644 --- a/pipelined/srt/testbench.sv +++ b/pipelined/srt/testbench.sv @@ -53,7 +53,7 @@ module testbench; // Test parameters parameter MEM_SIZE = 40000; - parameter MEM_WIDTH = 64+64+64+64; + parameter MEM_WIDTH = 64+64+64; // Test sizes `define memr 63:0 @@ -70,9 +70,9 @@ module testbench; integer testnum, errors; // Equip Int, Sqrt, or IntMod test - assign Int = 1'b1; + assign Int = 1'b0; assign Mod = 1'b0; - assign Sqrt = 1'b0; + assign Sqrt = 1'b1; // Divider srt srt(.clk, .Start(req), @@ -101,7 +101,7 @@ module testbench; begin testnum = 0; errors = 0; - $readmemh ("inttestvectors", Tests); + $readmemh ("sqrttestvectors", Tests); Vec = Tests[testnum]; a = Vec[`mema]; {asign, aExp, afrac} = a;