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wave-dos
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2021-05-03 14:02:19 -04:00 |
busy-mmu.do
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Add mmu waves (commented) to busybear
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2021-04-28 20:01:05 -04:00 |
regression-wally.py
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Fix bug in regression script
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2021-05-06 12:56:57 -04:00 |
run_sim.sh
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-03-30 15:25:07 -04:00 |
sim-buildroot
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start to add buildroot testbench
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2021-04-16 23:27:29 -04:00 |
sim-buildroot-batch
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start to add buildroot testbench
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2021-04-16 23:27:29 -04:00 |
sim-busybear
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busybear: add sim-busybear and sim-busybear-batch based on sim-wally
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2021-03-01 21:01:15 +00:00 |
sim-busybear-batch
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busybear: make a second .do file with better optimization for command line mode
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2021-03-08 19:35:00 +00:00 |
sim-wally
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sim-wally-batch
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Fixed issue with sim-wally-batch. Are people still using this script?
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2021-03-17 11:17:52 -05:00 |
sim-wally-batch-muldiv
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-03-30 15:25:07 -04:00 |
sim-wally-batch-rv32ic
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fixed sim-wally-32ic
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2021-04-08 13:40:16 -04:00 |
sim-wally-rv32ic
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fixed sim-wally-32ic
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2021-04-08 13:40:16 -04:00 |
vish_stacktrace.vstf
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Added some updates to divider - still not working all the time. Still a bug with signals within muldiv - specificaly MultDivE being modified during Execute stage. Seems to be triggered by ahblite signal.
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2021-04-02 06:27:37 -05:00 |
wally-buildroot-batch.do
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do script refactor
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2021-04-24 09:32:09 -04:00 |
wally-buildroot.do
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do script refactor
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2021-04-24 09:32:09 -04:00 |
wally-busybear-batch.do
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do script refactor
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2021-04-24 09:32:09 -04:00 |
wally-busybear.do
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Add mmu waves (commented) to busybear
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2021-04-28 20:01:05 -04:00 |
wally-coremark_bare.do
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coremark print statment
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2021-05-03 19:35:08 -04:00 |
wally-coremark.do
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-03-30 15:25:07 -04:00 |
wally-pipelined-batch-muldiv.do
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-03-30 15:25:07 -04:00 |
wally-pipelined-batch.do
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Condense the parallel and non-parallel wally-pipelined-batch.do files into one
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2021-03-16 18:15:13 -04:00 |
wally-pipelined-muldiv.do
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Added some updates to divider - still not working all the time. Still a bug with signals within muldiv - specificaly MultDivE being modified during Execute stage. Seems to be triggered by ahblite signal.
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2021-04-02 06:27:37 -05:00 |
wally-pipelined-ross.do
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Converted branch predictor preloads to use system verilog rather than modelsim's load command.
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2021-03-15 12:39:44 -05:00 |
wally-pipelined.do
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do script refactor
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2021-04-24 09:32:09 -04:00 |
wally-privileged.do
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Add medeleg tests
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2021-04-29 15:02:36 -04:00 |
wave-all.do
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-03-30 15:25:07 -04:00 |
wave.do
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fixed subtle typo in icache fsm. Was messing up hit spill hit.
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2021-05-03 16:55:36 -05:00 |