97 Commits

Author	SHA1	Message	Date
Ross Thompson	b2a77da96b	Changed sram1p1rw to have the same type of bytewrite enables as bram.	2022-03-30 11:38:25 -05:00
Ross Thompson	3dbf6790e1	Towards allowing dtim + bus.	2022-03-11 14:58:21 -06:00
Ross Thompson	81a2fbb6d2	mild cleanup.	2022-03-11 13:05:47 -06:00
Ross Thompson	11e5aad38a	Moved subcachelineread inside the cache. There is some ugliness to still resolve.	2022-03-11 12:44:04 -06:00
Ross Thompson	a12016e69b	Moved subcacheline read inside the cache.	2022-03-11 11:03:36 -06:00
Ross Thompson	326ecda060	removed unused parameter.	2022-03-11 10:43:54 -06:00
Ross Thompson	bdfca503fa	Name cleanup.	2022-03-10 18:44:50 -06:00
Ross Thompson	d77adbd673	Signal name cleanup.	2022-03-10 18:26:58 -06:00
Ross Thompson	83133f8c47	Partially working byte write enables. Works for cache, but not dtim or bus only.	2022-03-10 16:11:39 -06:00
Ross Thompson	d5f524a15e	Added byte write enables to cache SRAMs.	2022-03-10 15:48:31 -06:00
Ross Thompson	60e6c1ffa7	Moved cacheable signal into cache.	2022-03-08 16:34:02 -06:00
David Harris	48705457d5	LSU/Cache code review notes	2022-03-04 00:07:31 +00:00
Ross Thompson	fcbb577f31	Cache mods to be consistant with diagrams.	2022-02-14 12:40:51 -06:00
Ross Thompson	6e1a0af5d0	Eliminated more ports in cacheway.	2022-02-13 15:53:46 -06:00
Ross Thompson	a440bc2ac5	More cache cleanup.	2022-02-13 15:47:27 -06:00
Ross Thompson	1e7e59bdbd	Changed names of signals in cache.	2022-02-13 15:06:18 -06:00
Ross Thompson	f87a6f2c63	More cache cleanup.	2022-02-13 12:38:39 -06:00
Ross Thompson	f5c4bca47e	Formating improvements to cache.	2022-02-11 23:10:58 -06:00
Ross Thompson	6fa9490d0b	More cache simplifications.	2022-02-11 22:54:05 -06:00
Ross Thompson	ae2011eb07	Reduced seladr to 1 bit as second bit is same as selflush.	2022-02-11 22:41:36 -06:00
Ross Thompson	cb3d71a63d	Reduced complexity of the address selection during flush.	2022-02-11 22:27:27 -06:00
Ross Thompson	a0ee2f3d99	Removed redundant signals from cache.	2022-02-11 22:23:47 -06:00
Ross Thompson	aa04778d0b	Cache fsm simplifications.	2022-02-11 15:16:45 -06:00
Ross Thompson	e6c8cfd49b	Removed STATE_CPU_BUSY_FINISH_AMO from cache. This is redundant with STATE_CPU_BUSY.	2022-02-11 15:09:00 -06:00
Ross Thompson	83adacbee3	Simplified cache fsm.	2022-02-11 14:54:57 -06:00
Ross Thompson	c8e6884926	Fixed bug. ... It was possible for DTLBMissM to prevent a dcache flush.	2022-02-11 14:00:01 -06:00
David Harris	15fb7fee60	Cleaned up synthesis warnings	2022-02-11 01:15:16 +00:00
Ross Thompson	f23817bf69	Replacement policy cleanup.	2022-02-10 11:42:40 -06:00
Ross Thompson	411997010b	Replacement policy cleanup.	2022-02-10 11:40:10 -06:00
Ross Thompson	3a0af5d9e9	Cleanup + critical path optimizations.	2022-02-10 11:11:16 -06:00
Ross Thompson	fc68c2f09a	Cache name clarifications.	2022-02-10 10:50:17 -06:00
Ross Thompson	e00d404154	More cache cleanup.	2022-02-10 10:43:37 -06:00
Ross Thompson	65803ebe98	structural muxes.	2022-02-09 19:36:21 -06:00
Ross Thompson	2a989e6d05	More cache cleanup.	2022-02-09 19:29:15 -06:00
Ross Thompson	3b8ad3f7c7	Cleaned up comments.	2022-02-09 19:21:35 -06:00
Ross Thompson	911ee36b22	Removed all possilbe paths to PreSelAdr from TrapM.	2022-02-09 19:20:10 -06:00
Ross Thompson	01126535db	Annotated the final changes required to move sram address off the critial path.	2022-02-08 18:17:31 -06:00
Ross Thompson	498388c636	Cache cleanup write enables.	2022-02-08 17:52:09 -06:00
Ross Thompson	13561c67bd	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-02-08 14:22:19 -06:00
David Harris	3e16730226	RAM simplification	2022-02-08 20:15:23 +00:00
Ross Thompson	492c1473f3	Preparing to make a major change to the cache's write enables.	2022-02-08 09:47:01 -06:00
Ross Thompson	190d619940	cachefsm cleanup.	2022-02-07 22:09:56 -06:00
Ross Thompson	ca459a5915	Removed VDWriteEnable.	2022-02-07 21:59:18 -06:00
Ross Thompson	494802b2e1	more partial cleanup of fsm and write enables.	2022-02-07 17:41:56 -06:00
Ross Thompson	23a60d9875	Progress towards simplifying the cache's write enables.	2022-02-07 17:23:09 -06:00
Ross Thompson	fcd43ea004	more cleanup.	2022-02-07 13:29:19 -06:00
Ross Thompson	e72d54ea98	More cachefsm cleanup.	2022-02-07 13:19:37 -06:00
Ross Thompson	a6a7779ec0	More cachefsm cleanup.	2022-02-07 12:30:27 -06:00
Ross Thompson	7f732eb571	More cachefsm cleanup.	2022-02-07 11:16:20 -06:00
Ross Thompson	be67c4d559	More cachefsm cleanup.	2022-02-07 11:12:28 -06:00