Jordan Carlin
e98330bcdf
Merge branch 'main' of https://github.com/openhwgroup/cvw into script_updates
2024-08-15 19:10:51 -07:00
David Harris
5946f833d2
Added header for imperas.ic
2024-08-15 06:49:19 -07:00
David Harris
125884eb74
Fixes mstatus.FS to also be set when a FP operation sets a floating-point flag even if it doesnt write a FP register
2024-08-13 07:34:58 -07:00
Jordan Carlin
23b4f929c4
More VCS parameter cleanup
2024-08-11 17:49:07 -07:00
Jordan Carlin
d96dbc3130
Update VCS to work if param_overrides.txt already exists
2024-08-11 17:23:05 -07:00
Jordan Carlin
d3c759518d
Merge branch 'main' of https://github.com/openhwgroup/cvw into script_updates
2024-08-11 13:18:24 -07:00
Jordan Carlin
78bd6822c6
Add --params argument to wsim and use for overriding top-level params
2024-08-11 13:08:16 -07:00
Jordan Carlin
e6ddebde72
Add number of mismatches exit code to cachesim scripts
2024-08-11 11:02:23 -07:00
Jordan Carlin
e48d577545
More wally.do simplifications. Use variable expansion to combine multiple variables
2024-08-11 10:44:53 -07:00
Jordan Carlin
4ffd10bbb8
Automatically enable I_CACHE_ADDR_LOGGER and I_CACHE_ADDR_LOGGER in rv64gc_CacheSim.py. Working for Questa and Verilator.
2024-08-10 12:21:44 -07:00
Jordan Carlin
c19916a1d0
Allow Verilator to pass extra args at compile time (like -G...)
2024-08-10 12:18:54 -07:00
Jordan Carlin
8b1d49b5d0
Use tcl variable expansion in wally.do to avoid temp variables
2024-08-10 12:16:46 -07:00
Jordan Carlin
9a70480ef6
Update CacheSim scripts with new wsim and directory structure. Give simulator choice and switch default to verilator.
2024-08-09 21:50:18 -07:00
David Harris
e18d6b2744
Fixed lockstep simulation of directory of ELF files
2024-08-09 06:18:38 -07:00
David Harris
bc70f0b933
Merge pull request #869 from jordancarlin/installation
...
Installation and setup overhaul
2024-08-08 15:39:23 -07:00
David Harris
77b45f2d75
Fix creating cvw-arch-verif work directory
2024-08-08 05:25:28 -07:00
Jordan Carlin
76eef03fe4
Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
2024-08-07 20:22:55 -07:00
Huda-10xe
0303314f4e
Adding RVVI Functional Coverage Support
2024-08-07 14:31:16 +05:00
Jordan Carlin
42a9bbf28d
Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
2024-07-25 21:21:57 -07:00
Jordan Carlin
47452ddaaa
Remove hardcoded /opt/riscv
2024-07-23 23:29:45 -07:00
Rose Thompson
94a1ce32e7
Merge branch 'main' of https://github.com/openhwgroup/cvw
2024-07-22 17:48:34 -05:00
Rose Thompson
7223b15134
Merge branch 'rvvi'
2024-07-22 12:01:01 -05:00
David Harris
040b359813
Added more RV64I coverage generation
2024-07-22 08:52:19 -07:00
David Harris
757cc8a5f7
Added QuestaFunctCoverage to merge functional coverage reports
2024-07-22 08:49:54 -07:00
David Harris
e949c9cfba
Removed more obsolete imperas scripts
2024-07-21 19:47:23 -07:00
David Harris
da502d2d5a
Fixed makefile log typo
2024-07-21 19:47:00 -07:00
David Harris
7fd8c6e29a
Removed outdated wally-imperas files
2024-07-21 19:45:22 -07:00
Rose Thompson
9471dcd296
Refactored the fpga and testbench so the RVVI can be synthesized cleanly and simulated without any major code changes.
...
Adds three new configuration parameters to control enabling the RVVI packetizer and how much latency should exist between packets and the initial startup delay.
2024-07-19 17:08:47 -05:00
Jordan Carlin
8853fd52bc
Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
2024-07-18 21:36:00 -07:00
Rose Thompson
19e9dc5ce0
Fixed wally.do to correctly log functional coverage.
2024-07-16 15:52:52 -05:00
David Harris
d86ef9673d
More attempts at functional coverage
2024-07-15 15:34:44 -07:00
David Harris
ac05fa5553
Attempt at functional coverage; breaks code and functional coverage
2024-07-15 14:20:48 -07:00
David Harris
467436e30c
Renamed --coverage to --ccov and moved UCDB files to questa/ucdb
2024-07-15 05:32:16 -07:00
Jordan Carlin
09a061b580
Merge remote-tracking branch 'upstream/main' into installation
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Fix derivgen.pl shebang conflict
2024-07-08 06:46:41 -07:00
David Harris
ced8038343
Defined memory to be inaccessible by default
2024-07-05 08:34:28 -07:00
David Harris
12717a65f2
Fixed location of imperas.ic with new misa_B_Zba_Zbb_Zbs
2024-07-04 12:29:59 -07:00
David Harris
775930ae4f
Fixes to memfile generation for rv32. Updated new misa.B in imperas.ic, but need new version of ImperasDV to test
2024-07-04 07:36:56 -07:00
Jordan Carlin
985d9b4edc
Update run_vcs shebang after merge
2024-07-03 23:47:26 -07:00
Jordan Carlin
0459c68615
Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
2024-07-03 23:44:25 -07:00
Jordan Carlin
a30d4b29df
Additional shebang updates
2024-07-03 21:34:48 -07:00
Jordan Carlin
7419689359
Update python shebangs to use /usr/bin/env python3 so virtual environment can be used (also aids in general portability)
2024-07-03 20:42:55 -07:00
David Harris
af4403342f
renamed run_vcs.py to run_vcs, added instr/data in ebu
2024-07-03 08:02:38 -07:00
David Harris
1b62d2116a
VCS lockstep working
2024-07-02 18:05:13 -07:00
David Harris
aff0ad9c02
Progress on VCS; run_vcs rewritten in Python to ease passing parameters
2024-07-02 14:23:34 -07:00
David Harris
c972a914c8
Removed +plusarg_save because it doesn't silence VCS
2024-06-28 07:48:01 -07:00
David Harris
4a3532bf5a
VCS lockstep progress
2024-06-28 07:19:03 -07:00
David Harris
6cf250821d
Added VCS +plusarg_save to silence compiler
2024-06-28 06:53:44 -07:00
David Harris
e795143983
Turned off debug access to speed up VCS
2024-06-28 06:43:14 -07:00
David Harris
31b54fb247
Progress on VCS lockstep
2024-06-27 11:16:17 -07:00
Jordan Carlin
b76941d278
Use VCS built-in default macro instead of defining SIM_VCS
2024-06-21 15:17:59 -07:00
