mirror of
https://github.com/openhwgroup/cvw
synced 2025-01-23 13:04:28 +00:00
Merge branch 'main' of https://github.com/openhwgroup/cvw into installation
This commit is contained in:
Jordan Carlin
commit
0459c68615
@ -692,7 +692,7 @@ def main():
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# Define tests that we can run
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if (args.tests == "nightly"):
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test_list = [["python", "regression-wally", "--nightly"]]
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test_list = [["python", "regression-wally", "--nightly --buildroot"]]
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elif (args.tests == "test"):
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test_list = [["python", "regression-wally", ""]]
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elif (args.tests == "test_lint"):
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@ -170,7 +170,7 @@ derivconfigtests = [
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["fh_rv64gc", ["arch64f", "arch64f_divsqrt", "arch64f_fma", "arch64zfh", "arch64zfh_divsqrt", "arch64zfaf"]],
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["fdh_rv64gc", ["arch64f", "arch64f_divsqrt", "arch64f_fma", "arch64d", "arch64d_divsqrt", "arch64d_fma", "arch64zfh", "arch64zfh_divsqrt", "arch64zfaf", "arch64zfad"]],
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["fdq_rv64gc", ["arch64f", "arch64f_divsqrt", "arch64f_fma", "arch64d", "arch64d_divsqrt", "arch64d_fma", "arch64i", "arch64zfaf", "arch64zfad"]],
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["fdqh_rv64gc", ["arch64f", "arch64f_divsqrt", "arch64f_fma", "arch64d", "arch64d_divsqrt", "arch64d_fma", "arch64zfh", "arch64zfh_divsqrt", "arch64i", "wally64q", "arch64zfaf", "arch64zfad"]],
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["fdqh_rv64gc", ["arch64f", "arch64f_divsqrt", "arch64f_fma", "arch64d", "arch64d_divsqrt", "arch64d_fma", "arch64zfh", "arch64zfh_divsqrt", "arch64i", "arch64zfaf", "arch64zfad"]], # "wally64q" when Q is supported again in riscof config file
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]
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bpredtests = [
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@ -312,7 +312,6 @@ regressionDir = WALLY + '/sim'
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os.chdir(regressionDir)
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coveragesim = "questa" # Questa is required for code/functional coverage
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#defaultsim = "vcs" # Default simulator for all other tests; change to Verilator when flow is ready
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#defaultsim = "questa" # Default simulator for all other tests; change to Verilator when flow is ready
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defaultsim = "verilator" # Default simulator for all other tests
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@ -320,6 +319,7 @@ coverage = '--coverage' in sys.argv
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fp = '--fp' in sys.argv
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nightly = '--nightly' in sys.argv
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testfloat = '--testfloat' in sys.argv
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buildroot = '--buildroot' in sys.argv
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if (nightly):
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nightMode = "--nightly";
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@ -345,22 +345,27 @@ configs = [
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grepfile = WALLY + "/sim/verilator/logs/all_lints.log")
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]
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# run full buildroot boot simulation (slow) if buildroot flag is set. Start it early to overlap with other tests
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if (buildroot):
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addTests(tests_buildrootboot, defaultsim)
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if (coverage): # only run RV64GC tests on Questa in coverage mode
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addTests(tests64gc_nofp, "questa")
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if (fp):
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addTests(tests64gc_fp, "questa")
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else:
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for sim in sims:
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addTests(tests_buildrootshort, sim)
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if (not (buildroot and sim == defaultsim)): # skip shot buildroot sim if running long one
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addTests(tests_buildrootshort, sim)
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addTests(tests, sim)
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addTests(tests64gc_nofp, sim)
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addTests(tests64gc_fp, sim)
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# run derivative configurations in nightly regression
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# run derivative configurations in nightly regression
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if (nightly):
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# addTests(tests_buildrootboot, defaultsim)
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addTests(derivconfigtests, defaultsim)
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# testfloat tests
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if (testfloat): # for testfloat alone, just run testfloat tests
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configs = []
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8
bin/wsim
8
bin/wsim
@ -41,7 +41,13 @@ def LaunchSim(ElfFile, flags):
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print(f"Running VCS on " + args.config + " " + args.testsuite)
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if (args.gui):
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args.args += "gui"
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cmd = cd + "; ./run_vcs " + args.config + " " + args.testsuite + " " + args.args + " " + flags
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if (args.args == ""):
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vcsargs = ""
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else:
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vcsargs = " --args " + args.args
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if (ElfFile != ""):
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ElfFile = " --elffile " + ElfFile
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cmd = cd + "; ./run_vcs " + args.config + " " + args.testsuite + vcsargs + ElfFile + " " + flags
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print(cmd)
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os.system(cmd)
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171
sim/vcs/run_vcs
171
sim/vcs/run_vcs
@ -1,117 +1,84 @@
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#!/bin/bash
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# VCS Compilation for WALLY
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# Divya Kohli, Rose Thompson, David Harris 2024
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# Note: VCS produces warning about unsupported Linux Version, but runs successfully
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#!/usr/bin/python3
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# run_vcs
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# David_Harris@hmc.edu 2 July 2024
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# Run VCS on a given file, passing appropriate flags
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# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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# Color Definitions
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RED='\033[0;31m'
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GREEN='\033[0;32m'
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YELLOW='\033[1;33m'
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NC='\033[0m' # No Color
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# Directories
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CFG="${WALLY}/config"
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SRC="${WALLY}/src"
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TB="${WALLY}/testbench"
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import argparse
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import os
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import subprocess
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# Set CONFIG_VARIANT from the first script argument
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CONFIG_VARIANT=${1}
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# Set TESTSUITE from the second script argument
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TESTSUITE=$2
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# run a Linux command and return the result as a string in a form that VCS can use
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def runfindcmd(cmd):
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# print("Executing: " + str(cmd) )
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res = subprocess.check_output(cmd, shell=True)
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res = str(res)
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res = res.replace("\\n", " ") # replace newline with space
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res = res.replace("\'", "") # strip off quotation marks
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res = res[1:] # strip off leading b from byte string
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return res
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WKDIR="wkdir/${1}_${2}"
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COV="cov/${1}_${2}"
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LOGS="logs"
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parser = argparse.ArgumentParser()
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parser.add_argument("config", help="Configuration file")
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parser.add_argument("testsuite", help="Test suite (or none, when running a single ELF file) ")
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parser.add_argument("--elffile", "-e", help="ELF file name", default="")
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parser.add_argument("--coverage", "-c", help="Code & Functional Coverage", action="store_true")
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parser.add_argument("--fcov", "-f", help="Code & Functional Coverage", action="store_true")
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parser.add_argument("--args", "-a", help="Optional arguments passed to simulator via $value$plusargs", default="")
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parser.add_argument("--lockstep", "-l", help="Run ImperasDV lock, step, and compare.", action="store_true")
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# GUI not yet implemented
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#parser.add_argument("--gui", "-g", help="Simulate with GUI", action="store_true")
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args = parser.parse_args()
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print("run_vcs Config=" + args.config + " tests=" + args.testsuite + " elffile=" + args.elffile + " lockstep=" + str(args.lockstep) + " args='" + args.args + "'")
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if [ ${TESTSUITE} = "buildroot" ]; then
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shift 2
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PLUSARGS="$*"
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fi
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cfgdir = "$WALLY/config"
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srcdir = "$WALLY/src"
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tbdir = "$WALLY/testbench"
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wkdir = "$WALLY/sim/vcs/wkdir/" + args.config + "_" + args.testsuite
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covdir = "$WALLY/sim/vcs/cov/" + args.config + "_" + args.testsuite
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logdir = "$WALLY/sim/vcs/logs"
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clean_logs() {
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echo -e "${YELLOW}Cleaning up workspace...${NC}"
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rm -rf wkdir logs cov
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}
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clean_simprofile() {
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echo -e "${YELLOW}Cleaning up simprofile_dir...${NC}"
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rm -rf simprofile_dir* profileReport*
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}
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os.system("mkdir -p " + wkdir)
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os.system("mkdir -p " + covdir)
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os.system("mkdir -p " + logdir)
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#clean_simprofile
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#clean_logs
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# Function to create a directory if it does not exist
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create_directory() {
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local dir=$1 # Local variable for directory name
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# Find RTL source files
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rtlsrc_cmd = "find " + srcdir + ' -name "*.sv" ! -path "' + srcdir + '/generic/mem/rom1p1r_128x64.sv" ! -path "' + srcdir + '/generic/mem/ram2p1r1wbe_128x64.sv" ! -path "' + srcdir + '/generic/mem/rom1p1r_128x32.sv" ! -path "' + srcdir + '/generic/mem/ram2p1r1wbe_2048x64.sv"'
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rtlsrc_files = runfindcmd(rtlsrc_cmd)
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tbcommon_cmd = 'find ' + tbdir+'/common -name "*.sv" ! -path "' + tbdir+'/common/wallyTracer.sv"'
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tbcommon_files = runfindcmd(tbcommon_cmd)
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RTL_FILES = tbdir+'/testbench.sv ' + str(rtlsrc_files) + ' ' + str(tbcommon_files)
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if [ ! -d "$dir" ]; then
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mkdir -p "$dir"
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if [ $? -eq 0 ]; then
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echo "Directory $dir created successfully."
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else
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echo "Failed to create directory $dir."
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exit 1
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fi
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else
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echo "Directory $dir already exists."
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fi
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}
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# Include directories
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INCLUDE_PATH="+incdir+" + cfgdir + "/" + args.config + " +incdir+" + cfgdir + "/deriv/" + args.config + " +incdir+" + cfgdir + "/shared +incdir+$WALLY/tests +incdir+" + tbdir + " +incdir+" + srcdir
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# Create or verify WKDIR, COV, and LOGS directories
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create_directory "$WKDIR"
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create_directory "$COV"
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create_directory "$LOGS"
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# lockstep mode
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if (args.lockstep):
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LOCKSTEP_OPTIONS = " +define+USE_IMPERAS_DV +incdir+$IMPERAS_HOME/ImpPublic/include/host +incdir+$IMPERAS_HOME/ImpProprietary/include/host $IMPERAS_HOME/ImpPublic/source/host/rvvi/*.sv $IMPERAS_HOME/ImpProprietary/source/host/idv/*.sv " + tbdir + "/common/wallyTracer.sv"
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LOCKSTEP_SIMV = "-sv_lib $IMPERAS_HOME/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model"
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else:
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LOCKSTEP_OPTIONS = ""
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LOCKSTEP_SIMV = ""
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# Ensure the working directory exists
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if [ ! -d "$WKDIR" ]; then
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echo -e "${YELLOW}Directory $WKDIR does not exist. Creating it now...${NC}"
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mkdir -p "$WKDIR" && echo -e "${GREEN}Directory $WKDIR created successfully.${NC}" || {
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echo -e "${RED}Failed to create directory $WKDIR.${NC}"
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exit 1
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}
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else
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echo -e "${GREEN}Directory $WKDIR already exists.${NC}"
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fi
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# coverage mode
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if (args.coverage):
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COV_OPTIONS = "-cm line+cond+branch+fsm+tgl -cm_log " + wkdir + "/coverage.log -cm_dir " + wkdir + "/coverage"
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else:
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COV_OPTIONS = ""
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# GUI option handling
|
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GUI=""
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if [ "$3" = "gui" ]; then
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GUI="-gui"
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else
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GUI=""
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fi
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|
||||
# Collect include directories
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||||
INCLUDE_DIRS=$(find ${SRC} -type d | xargs -I {} echo -n "{} ")
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INCLUDE_PATH="+incdir+${CFG}/${CONFIG_VARIANT} +incdir+${CFG}/deriv/${CONFIG_VARIANT} +incdir+${CFG}/shared +incdir+../../tests +define+ +incdir+${TB} ${SRC}/cvw.sv +incdir+${SRC}"
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|
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# Prepare RTL files avoiding certain paths
|
||||
RTL_FILES="$INCLUDE_DIRS $(find ${SRC} -name "*.sv" ! -path "${SRC}/generic/mem/rom1p1r_128x64.sv" ! -path "${SRC}/generic/mem/ram2p1r1wbe_128x64.sv" ! -path "${SRC}/generic/mem/rom1p1r_128x32.sv" ! -path "${SRC}/generic/mem/ram2p1r1wbe_2048x64.sv") ${TB}/testbench.sv $(find ${TB}/common -name "*.sv" ! -path "${TB}/common/wallyTracer.sv")"
|
||||
|
||||
# Simulation and Coverage Commands
|
||||
# Simulation commands
|
||||
OUTPUT="sim_out"
|
||||
VCS_CMD="vcs +lint=all,noGCWM,noUI,noSVA-UA,noIDTS,noNS,noULCO,noCAWM-L,noWMIA-L,noSV-PIU,noSTASKW_CO,noSTASKW_CO1,noSTASKW_RMCOF -suppress +warn -sverilog +vc -Mupdate -line -full64 -lca -ntb_opts sensitive_dyn ${INCLUDE_PATH} " # Disabled Debug flags; add them back for a GUI mode -debug_access+all+reverse -kdb +vcs+vcdpluson
|
||||
SIMV_CMD="./${WKDIR}/$OUTPUT +TEST=${TESTSUITE} ${PLUSARGS} -no_save"
|
||||
VCS_CMD="vcs +lint=all,noGCWM,noUI,noSVA-UA,noIDTS,noNS,noULCO,noCAWM-L,noWMIA-L,noSV-PIU,noSTASKW_CO,noSTASKW_CO1,noSTASKW_RMCOF -suppress +warn -sverilog +vc -Mupdate -line -full64 -lca -ntb_opts sensitive_dyn " + INCLUDE_PATH # Disabled Debug flags; add them back for a GUI mode -debug_access+all+reverse -kdb +vcs+vcdpluson
|
||||
VCS = VCS_CMD + " -Mdir=" + wkdir + " " + srcdir + "/cvw.sv " + LOCKSTEP_OPTIONS + " " + COV_OPTIONS + " " + RTL_FILES + " -o " + wkdir + "/" + OUTPUT + " -work " + wkdir + " -Mlib " + wkdir + " -l " + logdir + "/" + args.config + "_" + args.testsuite + ".log"
|
||||
SIMV_CMD= wkdir + "/" + OUTPUT + " +TEST=" + args.testsuite + " " + args.elffile + " " + args.args + " -no_save " + LOCKSTEP_SIMV
|
||||
|
||||
# Clean and run simulation with VCS
|
||||
|
||||
if [ "$3" = "--coverage" ]; then
|
||||
echo -e "${YELLOW}#### Running VCS Simulation with Coverage ####${NC}"
|
||||
COV_OPTIONS="-cm line+cond+branch+fsm+tgl -cm_log ${WKDIR}/coverage.log -cm_dir ${WKDIR}/COVERAGE"
|
||||
COV_RUN="urg -dir ./${WKDIR}/COVERAGE.vdb -format text -report IndividualCovReport/${CONFIG_VARIANT}_${TESTSUITE}"
|
||||
$VCS_CMD -Mdir=${WKDIR} $COV_OPTIONS $RTL_FILES -o ${WKDIR}/$OUTPUT -Mlib ${WKDIR} -work ${WKDIR} -l "$LOGS/${CONFIG_VARIANT}_${TESTSUITE}.log"
|
||||
$SIMV_CMD $COV_OPTIONS # dh 6/27/24 *** are COV_OPTIONS really needed?
|
||||
$COV_RUN
|
||||
#cp -rf urgReport $COV
|
||||
elif [ "$3" = "--lockstep" ]; then
|
||||
echo -e "${YELLOW}#### Running VCS Simulation with Lockstep ####${NC}"
|
||||
LOCKSTEP_OPTIONS=" +define+USE_IMPERAS_DV +incdir+${IMPERAS_HOME}/ImpPublic/include/host +incdir+${IMPERAS_HOME}/ImpProprietary/include/host ${IMPERAS_HOME}/ImpPublic/source/host/rvvi/*.sv ${IMPERAS_HOME}/ImpProprietary/source/host/idv/*.sv ${TB}/common/wallyTracer.sv"
|
||||
LOCKSTEP_SIMV="-sv_lib ${IMPERAS_HOME}/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model"
|
||||
$VCS_CMD -Mdir=${WKDIR} $LOCKSTEP_OPTIONS $RTL_FILES -o ${WKDIR}/$OUTPUT -Mlib ${WKDIR} -work ${WKDIR} -l "$LOGS/${CONFIG_VARIANT}_${TESTSUITE}.log"
|
||||
$SIMV_CMD $LOCKSTEP_SIMV
|
||||
else
|
||||
echo -e "${YELLOW}#### Running VCS Simulation ####${NC}"
|
||||
$VCS_CMD -Mdir=${WKDIR} $RTL_FILES -o ${WKDIR}/$OUTPUT -work ${WKDIR} -Mlib ${WKDIR} -l "$LOGS/${CONFIG_VARIANT}_${TESTSUITE}.log"
|
||||
$SIMV_CMD
|
||||
fi
|
||||
# Run simulation
|
||||
print("Executing: " + str(VCS) )
|
||||
subprocess.run(VCS, shell=True)
|
||||
subprocess.run(SIMV_CMD, shell=True)
|
||||
if (args.coverage):
|
||||
COV_RUN = "urg -dir " + wkdir + "/coverage.vdb -format text -report IndividualCovReport/" + args.config + "_" + args.testsuite
|
||||
subprocess.run(COV_RUN, shell=True)
|
||||
|
||||
|
||||
@ -116,7 +116,7 @@ module ebu import cvw::*; #(parameter cvw_t P) (
|
||||
assign HBURST = LSUSelect ? LSUHBURSTOut : IFUSelect ? IFUHBURSTOut : '0; // If doing memory accesses, use LSUburst, else use Instruction burst.
|
||||
assign HTRANS = LSUSelect ? LSUHTRANSOut : IFUSelect ? IFUHTRANSOut: '0; // SEQ if not first read or write, NONSEQ if first read or write, IDLE otherwise
|
||||
assign HWRITE = LSUSelect ? LSUHWRITEOut : '0;
|
||||
assign HPROT = 4'b0011; // not used; see Section 3.7
|
||||
assign HPROT = {3'b001, LSUSelect}; // treat as privileged access of either Opcode fetch or Data access
|
||||
assign HMASTLOCK = 1'b0; // no locking supported
|
||||
|
||||
// data phase muxing. This would be a mux if IFU wrote data.
|
||||
|
||||
@ -56,8 +56,8 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi);
|
||||
logic [`NUM_REGS-1:0] frf_wb;
|
||||
logic [4:0] frf_a4;
|
||||
logic frf_we4;
|
||||
logic [P.XLEN-1:0] CSRArray [logic[11:0]];
|
||||
logic [P.XLEN-1:0] CSRArrayOld [logic[11:0]];
|
||||
logic [P.XLEN-1:0] CSRArray [4095:0];
|
||||
logic [P.XLEN-1:0] CSRArrayOld [4095:0];
|
||||
logic [`NUM_CSRS-1:0] CSR_W;
|
||||
logic CSRWriteM, CSRWriteW;
|
||||
logic [11:0] CSRAdrM, CSRAdrW;
|
||||
|
||||
@ -26,7 +26,8 @@
|
||||
|
||||
module watchdog #(parameter XLEN, WatchDogTimerThreshold)
|
||||
(input clk,
|
||||
input reset
|
||||
input reset,
|
||||
string TEST
|
||||
);
|
||||
|
||||
// check for hang up.
|
||||
@ -46,9 +47,14 @@ module watchdog #(parameter XLEN, WatchDogTimerThreshold)
|
||||
always_comb begin
|
||||
WatchDogTimeOut = WatchDogTimerCount >= WatchDogTimerThreshold;
|
||||
if(WatchDogTimeOut) begin
|
||||
$display("FAILURE: Watch Dog Time Out triggered. PCW stuck at %x for more than %d cycles", PCW, WatchDogTimerCount);
|
||||
$stop;
|
||||
end
|
||||
if (TEST == "buildroot") $display("Watch Dog Time Out triggered. This is a normal termination for a full buildroot boot. Check sim/<simulator>/logs/buildroot_uart.log to check if the boot printed the login prompt.");
|
||||
else $display("FAILURE: Watch Dog Time Out triggered. PCW stuck at %x for more than %d cycles", PCW, WatchDogTimerCount);
|
||||
`ifdef QUESTA
|
||||
$stop; // if this is changed to $finish for Questa, wally-batch.do does not go to the next step to run coverage, and wally.do terminates without allowing GUI debug
|
||||
`else
|
||||
$finish;
|
||||
`endif
|
||||
end
|
||||
end
|
||||
|
||||
endmodule
|
||||
|
||||
@ -1,378 +0,0 @@
|
||||
///////////////////////////////////////////
|
||||
// testbench.sv
|
||||
//
|
||||
// Written: David_Harris@hmc.edu 9 January 2021
|
||||
// Modified:
|
||||
//
|
||||
// Purpose: Wally Testbench and helper modules
|
||||
// Applies test programs from the riscv-arch-test and Imperas suites
|
||||
//
|
||||
// A component of the Wally configurable RISC-V project.
|
||||
//
|
||||
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
|
||||
//
|
||||
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
|
||||
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
|
||||
// may obtain a copy of the License at
|
||||
//
|
||||
// https://solderpad.org/licenses/SHL-2.1/
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, any work distributed under the
|
||||
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
|
||||
// either express or implied. See the License for the specific language governing permissions
|
||||
// and limitations under the License.
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
`include "config.vh"
|
||||
|
||||
|
||||
// This is set from the command line script
|
||||
// `define USE_IMPERAS_DV
|
||||
|
||||
`ifdef USE_IMPERAS_DV
|
||||
`include "idv/idv.svh"
|
||||
`endif
|
||||
|
||||
import cvw::*;
|
||||
|
||||
module testbench;
|
||||
parameter DEBUG=0;
|
||||
|
||||
`ifdef USE_IMPERAS_DV
|
||||
import idvPkg::*;
|
||||
import rvviApiPkg::*;
|
||||
import idvApiPkg::*;
|
||||
`endif
|
||||
|
||||
`include "parameter-defs.vh"
|
||||
|
||||
logic clk;
|
||||
logic reset_ext, reset;
|
||||
|
||||
|
||||
logic [P.XLEN-1:0] testadr, testadrNoBase;
|
||||
string InstrFName, InstrDName, InstrEName, InstrMName, InstrWName;
|
||||
logic [31:0] InstrW;
|
||||
|
||||
logic [3:0] dummy;
|
||||
|
||||
logic [P.AHBW-1:0] HRDATAEXT;
|
||||
logic HREADYEXT, HRESPEXT;
|
||||
logic HSELEXTSDC;
|
||||
logic [P.PA_BITS-1:0] HADDR;
|
||||
logic [P.AHBW-1:0] HWDATA;
|
||||
logic [P.XLEN/8-1:0] HWSTRB;
|
||||
logic HWRITE;
|
||||
logic [2:0] HSIZE;
|
||||
logic [2:0] HBURST;
|
||||
logic [3:0] HPROT;
|
||||
logic [1:0] HTRANS;
|
||||
logic HMASTLOCK;
|
||||
logic HCLK, HRESETn;
|
||||
logic [P.XLEN-1:0] PCW;
|
||||
logic [31:0] NextInstrE, InstrM;
|
||||
|
||||
string ProgramAddrMapFile, ProgramLabelMapFile;
|
||||
integer ProgramAddrLabelArray [string] = '{ "begin_signature" : 0, "tohost" : 0 };
|
||||
logic DCacheFlushDone, DCacheFlushStart;
|
||||
string testName;
|
||||
string memfilename, testDir, adrstr, elffilename;
|
||||
|
||||
logic [31:0] GPIOIN, GPIOOUT, GPIOEN;
|
||||
logic UARTSin, UARTSout;
|
||||
logic SPIIn, SPIOut;
|
||||
logic [3:0] SPICS;
|
||||
logic SDCIntr;
|
||||
|
||||
logic HREADY;
|
||||
logic HSELEXT;
|
||||
|
||||
logic InitializingMemories;
|
||||
integer ResetCount, ResetThreshold;
|
||||
logic InReset;
|
||||
|
||||
// Imperas look here.
|
||||
initial
|
||||
begin
|
||||
ResetCount = 0;
|
||||
ResetThreshold = 2;
|
||||
InReset = 1;
|
||||
testadr = 0;
|
||||
testadrNoBase = 0;
|
||||
|
||||
if ($value$plusargs("testDir=%s", testDir)) begin
|
||||
memfilename = {testDir, "/ref/ref.elf.memfile"};
|
||||
elffilename = {testDir, "/ref/ref.elf"};
|
||||
$display($sformatf("%m @ t=%0t: loading testDir %0s", $time, testDir));
|
||||
end else begin
|
||||
$error("Must specify test directory using plusarg testDir");
|
||||
end
|
||||
|
||||
if (P.BUS_SUPPORTED) $readmemh(memfilename, dut.uncoregen.uncore.ram.ram.memory.RAM);
|
||||
else $error("Imperas test bench requires BUS.");
|
||||
|
||||
ProgramAddrMapFile = {testDir, "/ref/ref.elf.objdump.addr"};
|
||||
ProgramLabelMapFile = {testDir, "/ref/ref.elf.objdump.lab"};
|
||||
|
||||
// declare memory labels that interest us, the updateProgramAddrLabelArray task will find the addr of each label and fill the array
|
||||
// to expand, add more elements to this array and initialize them to zero (also initilaize them to zero at the start of the next test)
|
||||
updateProgramAddrLabelArray(ProgramAddrMapFile, ProgramLabelMapFile, ProgramAddrLabelArray);
|
||||
$display("Read memfile %s", memfilename);
|
||||
|
||||
end
|
||||
|
||||
`ifdef USE_IMPERAS_DV
|
||||
|
||||
rvviTrace #(.XLEN(P.XLEN), .FLEN(P.FLEN)) rvvi();
|
||||
wallyTracer #(P) wallyTracer(rvvi);
|
||||
|
||||
trace2log idv_trace2log(rvvi);
|
||||
trace2cov idv_trace2cov(rvvi);
|
||||
|
||||
// enabling of comparison types
|
||||
trace2api #(.CMP_PC (1),
|
||||
.CMP_INS (1),
|
||||
.CMP_GPR (1),
|
||||
.CMP_FPR (1),
|
||||
.CMP_VR (0),
|
||||
.CMP_CSR (1)
|
||||
) idv_trace2api(rvvi);
|
||||
|
||||
initial begin
|
||||
|
||||
IDV_MAX_ERRORS = 3;
|
||||
|
||||
// Initialize REF (do this before initializing the DUT)
|
||||
if (!rvviVersionCheck(RVVI_API_VERSION)) begin
|
||||
$display($sformatf("%m @ t=%0t: Expecting RVVI API version %0d.", $time, RVVI_API_VERSION));
|
||||
$fatal;
|
||||
end
|
||||
|
||||
void'(rvviRefConfigSetString(IDV_CONFIG_MODEL_VENDOR, "riscv.ovpworld.org"));
|
||||
void'(rvviRefConfigSetString(IDV_CONFIG_MODEL_NAME, "riscv"));
|
||||
void'(rvviRefConfigSetString(IDV_CONFIG_MODEL_VARIANT, "RV64GC"));
|
||||
void'(rvviRefConfigSetInt(IDV_CONFIG_MODEL_ADDRESS_BUS_WIDTH, 56));
|
||||
void'(rvviRefConfigSetInt(IDV_CONFIG_MAX_NET_LATENCY_RETIREMENTS, 6));
|
||||
|
||||
if (!rvviRefInit(elffilename)) begin
|
||||
$display($sformatf("%m @ t=%0t: rvviRefInit failed", $time));
|
||||
$fatal;
|
||||
end
|
||||
|
||||
// Volatile CSRs
|
||||
void'(rvviRefCsrSetVolatile(0, 32'hC00)); // CYCLE
|
||||
void'(rvviRefCsrSetVolatile(0, 32'hB00)); // MCYCLE
|
||||
void'(rvviRefCsrSetVolatile(0, 32'hC02)); // INSTRET
|
||||
void'(rvviRefCsrSetVolatile(0, 32'hB02)); // MINSTRET
|
||||
void'(rvviRefCsrSetVolatile(0, 32'hC01)); // TIME
|
||||
|
||||
// cannot predict this register due to latency between
|
||||
// pending and taken
|
||||
void'(rvviRefCsrSetVolatile(0, 32'h344)); // MIP
|
||||
void'(rvviRefCsrSetVolatile(0, 32'h144)); // SIP
|
||||
|
||||
// Privileges for PMA are set in the imperas.ic
|
||||
// volatile (IO) regions are defined here
|
||||
// only real ROM/RAM areas are BOOTROM and UNCORE_RAM
|
||||
if (P.CLINT_SUPPORTED) begin
|
||||
void'(rvviRefMemorySetVolatile(P.CLINT_BASE, (P.CLINT_BASE + P.CLINT_RANGE)));
|
||||
end
|
||||
if (P.GPIO_SUPPORTED) begin
|
||||
void'(rvviRefMemorySetVolatile(P.GPIO_BASE, (P.GPIO_BASE + P.GPIO_RANGE)));
|
||||
end
|
||||
if (P.UART_SUPPORTED) begin
|
||||
void'(rvviRefMemorySetVolatile(P.UART_BASE, (P.UART_BASE + P.UART_RANGE)));
|
||||
end
|
||||
if (P.PLIC_SUPPORTED) begin
|
||||
void'(rvviRefMemorySetVolatile(P.PLIC_BASE, (P.PLIC_BASE + P.PLIC_RANGE)));
|
||||
end
|
||||
if (P.SDC_SUPPORTED) begin
|
||||
void'(rvviRefMemorySetVolatile(P.SDC_BASE, (P.SDC_BASE + P.SDC_RANGE)));
|
||||
end
|
||||
if (P.SPI_SUPPORTED) begin
|
||||
void'(rvviRefMemorySetVolatile(P.SPI_BASE, (P.SPI_BASE + P.SPI_RANGE)));
|
||||
end
|
||||
|
||||
if(P.XLEN==32) begin
|
||||
void'(rvviRefCsrSetVolatile(0, 32'hC80)); // CYCLEH
|
||||
void'(rvviRefCsrSetVolatile(0, 32'hB80)); // MCYCLEH
|
||||
void'(rvviRefCsrSetVolatile(0, 32'hC82)); // INSTRETH
|
||||
void'(rvviRefCsrSetVolatile(0, 32'hB82)); // MINSTRETH
|
||||
end
|
||||
|
||||
void'(rvviRefCsrSetVolatile(0, 32'h104)); // SIE - Temporary!!!!
|
||||
|
||||
end
|
||||
|
||||
always @(dut.core.priv.priv.csr.csri.MIP_REGW[7]) void'(rvvi.net_push("MTimerInterrupt", dut.core.priv.priv.csr.csri.MIP_REGW[7]));
|
||||
always @(dut.core.priv.priv.csr.csri.MIP_REGW[11]) void'(rvvi.net_push("MExternalInterrupt", dut.core.priv.priv.csr.csri.MIP_REGW[11]));
|
||||
always @(dut.core.priv.priv.csr.csri.MIP_REGW[9]) void'(rvvi.net_push("SExternalInterrupt", dut.core.priv.priv.csr.csri.MIP_REGW[9]));
|
||||
always @(dut.core.priv.priv.csr.csri.MIP_REGW[3]) void'(rvvi.net_push("MSWInterrupt", dut.core.priv.priv.csr.csri.MIP_REGW[3]));
|
||||
always @(dut.core.priv.priv.csr.csri.MIP_REGW[1]) void'(rvvi.net_push("SSWInterrupt", dut.core.priv.priv.csr.csri.MIP_REGW[1]));
|
||||
always @(dut.core.priv.priv.csr.csri.MIP_REGW[5]) void'(rvvi.net_push("STimerInterrupt", dut.core.priv.priv.csr.csri.MIP_REGW[5]));
|
||||
|
||||
final begin
|
||||
void'(rvviRefShutdown());
|
||||
end
|
||||
|
||||
`endif
|
||||
|
||||
flopenr #(P.XLEN) PCWReg(clk, reset, ~dut.core.ieu.dp.StallW, dut.core.ifu.PCM, PCW);
|
||||
flopenr #(32) InstrWReg(clk, reset, ~dut.core.ieu.dp.StallW, InstrM, InstrW);
|
||||
|
||||
// check assertions for a legal configuration
|
||||
riscvassertions #(P) riscvassertions();
|
||||
|
||||
|
||||
// instantiate device to be tested
|
||||
assign GPIOIN = 0;
|
||||
assign UARTSin = 1;
|
||||
|
||||
if(P.EXT_MEM_SUPPORTED) begin
|
||||
ram_ahb #(.BASE(P.EXT_MEM_BASE), .RANGE(P.EXT_MEM_RANGE))
|
||||
ram (.HCLK, .HRESETn, .HADDR, .HWRITE, .HTRANS, .HWDATA, .HSELRam(HSELEXT),
|
||||
.HREADRam(HRDATAEXT), .HREADYRam(HREADYEXT), .HRESPRam(HRESPEXT), .HREADY,
|
||||
.HWSTRB);
|
||||
end else begin
|
||||
assign HREADYEXT = 1;
|
||||
assign HRESPEXT = 0;
|
||||
assign HRDATAEXT = 0;
|
||||
end
|
||||
|
||||
if(P.SDC_SUPPORTED) begin : sdcard
|
||||
// *** fix later
|
||||
/* -----\/----- EXCLUDED -----\/-----
|
||||
sdModel sdcard
|
||||
(.sdClk(SDCCLK),
|
||||
.cmd(SDCCmd),
|
||||
.dat(SDCDat));
|
||||
|
||||
assign SDCCmd = SDCCmdOE ? SDCCmdOut : 1'bz;
|
||||
assign SDCCmdIn = SDCCmd;
|
||||
assign SDCDatIn = SDCDat;
|
||||
-----/\----- EXCLUDED -----/\----- */
|
||||
assign SDCIntr = 0;
|
||||
end else begin
|
||||
assign SDCIntr = 0;
|
||||
end
|
||||
|
||||
wallypipelinedsoc #(P) dut(.clk, .reset_ext, .reset, .HRDATAEXT, .HREADYEXT, .HRESPEXT, .HSELEXT, .HSELEXTSDC,
|
||||
.HCLK, .HRESETn, .HADDR, .HWDATA, .HWSTRB, .HWRITE, .HSIZE, .HBURST, .HPROT,
|
||||
.HTRANS, .HMASTLOCK, .HREADY, .TIMECLK(1'b0), .GPIOIN, .GPIOOUT, .GPIOEN,
|
||||
.UARTSin, .UARTSout, .SDCIntr, .SPICS, .SPIOut, .SPIIn);
|
||||
|
||||
// Track names of instructions
|
||||
instrTrackerTB it(clk, reset, dut.core.ieu.dp.FlushE,
|
||||
dut.core.ifu.InstrRawF[31:0],
|
||||
dut.core.ifu.InstrD, dut.core.ifu.InstrE,
|
||||
InstrM, InstrW,
|
||||
InstrFName, InstrDName, InstrEName, InstrMName, InstrWName);
|
||||
|
||||
// initialize tests
|
||||
|
||||
// generate clock to sequence tests
|
||||
always
|
||||
begin
|
||||
clk = 1; # 5; clk = 0; # 5;
|
||||
// if ($time % 100000 == 0) $display("Time is %0t", $time);
|
||||
end
|
||||
|
||||
// check results
|
||||
assign reset_ext = InReset;
|
||||
|
||||
always @(negedge clk)
|
||||
begin
|
||||
InitializingMemories = 0;
|
||||
if(InReset == 1) begin
|
||||
// once the test inidicates it's done we need to immediately hold reset for a number of cycles.
|
||||
if(ResetCount < ResetThreshold) ResetCount = ResetCount + 1;
|
||||
else begin // hit reset threshold so we remove reset.
|
||||
InReset = 0;
|
||||
ResetCount = 0;
|
||||
end
|
||||
end
|
||||
end // always @ (negedge clk)
|
||||
|
||||
|
||||
// track the current function or global label
|
||||
if (DEBUG == 1) begin : FunctionName
|
||||
FunctionName #(P) FunctionName(.reset(reset),
|
||||
.clk(clk),
|
||||
.ProgramAddrMapFile(ProgramAddrMapFile),
|
||||
.ProgramLabelMapFile(ProgramLabelMapFile));
|
||||
end
|
||||
|
||||
// Duplicate copy of pipeline registers that are optimized out of some configurations
|
||||
mux2 #(32) FlushInstrMMux(dut.core.ifu.InstrE, dut.core.ifu.nop, dut.core.ifu.FlushM, NextInstrE);
|
||||
flopenr #(32) InstrMReg(clk, reset, ~dut.core.ifu.StallM, NextInstrE, InstrM);
|
||||
|
||||
// Termination condition
|
||||
// terminate on a specific ECALL after li x3,1 for old Imperas tests, *** remove this when old imperas tests are removed
|
||||
// or sw gp,-56(t0) for new Imperas tests
|
||||
// or sd gp, -56(t0)
|
||||
// or on a jump to self infinite loop (6f) for RISC-V Arch tests
|
||||
logic ecf; // remove this once we don't rely on old Imperas tests with Ecalls
|
||||
if (P.ZICSR_SUPPORTED) assign ecf = dut.core.priv.priv.EcallFaultM;
|
||||
else assign ecf = 0;
|
||||
assign DCacheFlushStart = ecf &
|
||||
(dut.core.ieu.dp.regf.rf[3] == 1 |
|
||||
(dut.core.ieu.dp.regf.we3 &
|
||||
dut.core.ieu.dp.regf.a3 == 3 &
|
||||
dut.core.ieu.dp.regf.wd3 == 1)) |
|
||||
((InstrM == 32'h6f | InstrM == 32'hfc32a423 | InstrM == 32'hfc32a823) & dut.core.ieu.c.InstrValidM ) |
|
||||
((dut.core.lsu.IEUAdrM == ProgramAddrLabelArray["tohost"]) & InstrMName == "SW" );
|
||||
|
||||
DCacheFlushFSM #(P) DCacheFlushFSM(.clk(clk),
|
||||
.start(DCacheFlushStart),
|
||||
.done(DCacheFlushDone));
|
||||
|
||||
// initialize the branch predictor
|
||||
if (P.BPRED_SUPPORTED == 1)
|
||||
begin
|
||||
genvar adrindex;
|
||||
|
||||
// Initializing all zeroes into the branch predictor memory.
|
||||
for(adrindex = 0; adrindex < 1024; adrindex++) begin
|
||||
initial begin
|
||||
force dut.core.ifu.bpred.bpred.Predictor.DirPredictor.PHT.mem[adrindex] = 0;
|
||||
force dut.core.ifu.bpred.bpred.TargetPredictor.memory.mem[adrindex] = 0;
|
||||
#1;
|
||||
release dut.core.ifu.bpred.bpred.Predictor.DirPredictor.PHT.mem[adrindex];
|
||||
release dut.core.ifu.bpred.bpred.TargetPredictor.memory.mem[adrindex];
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
watchdog #(P.XLEN, 1000000) watchdog(.clk, .reset); // check if PCW is stuck
|
||||
|
||||
endmodule
|
||||
|
||||
|
||||
/* verilator lint_on STMTDLY */
|
||||
/* verilator lint_on WIDTH */
|
||||
|
||||
|
||||
task automatic updateProgramAddrLabelArray;
|
||||
input string ProgramAddrMapFile, ProgramLabelMapFile;
|
||||
inout integer ProgramAddrLabelArray [string];
|
||||
// Gets the memory location of begin_signature
|
||||
integer ProgramLabelMapFP, ProgramAddrMapFP;
|
||||
ProgramLabelMapFP = $fopen(ProgramLabelMapFile, "r");
|
||||
ProgramAddrMapFP = $fopen(ProgramAddrMapFile, "r");
|
||||
|
||||
if (ProgramLabelMapFP & ProgramAddrMapFP) begin // check we found both files
|
||||
while (!$feof(ProgramLabelMapFP)) begin
|
||||
string label, adrstr;
|
||||
integer returncode;
|
||||
returncode = $fscanf(ProgramLabelMapFP, "%s\n", label);
|
||||
returncode = $fscanf(ProgramAddrMapFP, "%s\n", adrstr);
|
||||
if (ProgramAddrLabelArray.exists(label))
|
||||
ProgramAddrLabelArray[label] = adrstr.atohex();
|
||||
end
|
||||
end
|
||||
$fclose(ProgramLabelMapFP);
|
||||
$fclose(ProgramAddrMapFP);
|
||||
endtask
|
||||
|
||||
@ -118,10 +118,9 @@ module testbench;
|
||||
TEST = "none";
|
||||
if (!$value$plusargs("ElfFile=%s", ElfFile))
|
||||
ElfFile = "none";
|
||||
else begin
|
||||
end
|
||||
if (!$value$plusargs("INSTR_LIMIT=%d", INSTR_LIMIT))
|
||||
INSTR_LIMIT = 0;
|
||||
//$display("TEST = %s ElfFile = %s", TEST, ElfFile);
|
||||
|
||||
// pick tests based on modes supported
|
||||
//tests = '{};
|
||||
@ -613,7 +612,7 @@ module testbench;
|
||||
InstrFName, InstrDName, InstrEName, InstrMName, InstrWName);
|
||||
|
||||
// watch for problems such as lockup, reading unitialized memory, bad configs
|
||||
watchdog #(P.XLEN, 1000000) watchdog(.clk, .reset); // check if PCW is stuck
|
||||
watchdog #(P.XLEN, 1000000) watchdog(.clk, .reset, .TEST); // check if PCW is stuck
|
||||
ramxdetector #(P.XLEN, P.LLEN) ramxdetector(clk, dut.core.lsu.MemRWM[1], dut.core.lsu.LSULoadAccessFaultM, dut.core.lsu.ReadDataM,
|
||||
dut.core.ifu.PCM, InstrM, dut.core.lsu.IEUAdrM, InstrMName);
|
||||
riscvassertions #(P) riscvassertions(); // check assertions for a legal configuration
|
||||
|
||||
Loading…
Reference in New Issue
Block a user